公开(公告)号：WO2022267349A1

公开(公告)日：2022-12-29

申请号：PCT/CN2021/134433

申请日：2021-11-30

Applicant: 苏州浪潮智能科技有限公司

Inventor： 候志立

IPC: G06F3/06 ,  G06F9/30 ,  G06F13/20 ,  G06F3/061 ,  G06F3/0659 ,  G06F9/30098

Abstract: 一种寄存器读取方法、装置、设备和介质，在服务器宕机后，触发CPU寄存器收集请求，不同类型的CPU对应的需要收集数据的寄存器类型和数量不同，因此，先确定与CPU类型对应的需要读取的寄存器，确定寄存器的读取方式，规避了只能采用单指令的读取方式无法满足现场宕机分析需求的弊端，然后，采用PECI总线读取多个寄存器的寄存器数据，直接采用PECI总线收集CPU的寄存器，规避了中间通过ME转接造成的性能过分依赖于ME的稳定性的问题，极大地提高了寄存器的读取成功率。

公开(公告)号：WO2022193624A1

公开(公告)日：2022-09-22

申请号：PCT/CN2021/123019

申请日：2021-10-11

Applicant: 湖南中车时代通信信号有限公司

Inventor： 刘振玉 ,  罗红磊 ,  杨凯 ,  耿宏亮 ,  赵臣烜 ,  戴毅欣 ,  李启翮 ,  孙可 ,  沈涛

IPC: H04L29/08 ,  G06F13/40 ,  G06F13/38 ,  G06F13/20

Abstract: 一种跨不同本国系统的专用传输模块适配方法、装置、设备及计算机可读存储介质，通过预先依据目标列车运行控制系统的技术互联共通规范建立专用传输模块，在适配新的本国系统时，根据待适配本国系统的硬件接口类型和对待适配本国系统的自定义配置参数，配置与待适配本国系统对应的目标专用传输模块以实现待适配本国系统与目标列车运行控制系统之间的应用会话，并建立待适配本国系统的通信接口与目标专用传输模块之间的通信传输通道，使得本国系统可以基于既有的硬件接口进行通信交互，并转换为专用传输模块的语言与欧洲列车控制系统或中国列车控制系统进行安全通信与应用交互。

公开(公告)号：WO2022192813A2

公开(公告)日：2022-09-15

申请号：PCT/US2022/070262

申请日：2022-01-20

Applicant: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. ,  KWATRA, Nitin

Inventor： KWATRA, Nitin

IPC: G06F13/372 ,  G06F13/20 ,  G06F13/3625 ,  G06F13/4282

Abstract: Calibrating devices communicating on the shared bus can assist in reducing conflicts on the bus and the resulting loss of data. For example, the timing of transmission of data from one device to another device on the shared bus may be adjusted to compensate for delays on the shared bus. For example, the transmitting device may adjust transmission to an earlier time than the programmed time by an amount proportional to a known delay, such that the signal arrives at a receiving device at the programmed time. When the adjustment is not able to obtain a desired alignment or would cause conflicts on the shared data bus, the timing may be adjusted to delay the transmission, rather than advance the transmission, such that the adjusted transmission time results in the receipt of the signal at the receiving device in an unused time window after the programmed time.

公开(公告)号：WO2022156288A1

公开(公告)日：2022-07-28

申请号：PCT/CN2021/125771

申请日：2021-10-22

Applicant: 华为技术有限公司

Inventor： 张云霁 ,  马继彬 ,  吴登奔 ,  陈庆学

IPC: G06F13/16 ,  G06F13/20 ,  G06F16/25

Abstract: 本申请涉及数据处理技术领域，可应用于自动驾驶的数据处理，具体涉及一种传感器数据的处理方法及装置，所述方法包括：获取一个或多个传感器配置信息；根据所述一个或多个传感器配置信息加载对应的各数据处理插件；所述各数据处理插件接收各传感器的数据，所述各数据处理插件将接收到的所述各传感器的数据转为设定格式的数据。基于本申请提供的技术方案，可以将传感器输入数据与上层业务处理算法进行隔离，以快速适配不同的算法对数据的需求。

公开(公告)号：WO2022139646A1

公开(公告)日：2022-06-30

申请号：PCT/SE2021/050497

申请日：2021-05-27

Applicant: IMSYS AB ,  TELESIS INNOVATION AB

Inventor： BLIXT, Stefan

IPC: G06F13/16 ,  G06F13/20 ,  G06F15/16 ,  G06F15/78

Abstract: There is provided a data processing system (10; 10-A; 10-B) configured to perform data processing of a data flow application. The data processing system includes a control processor (11) having access to memory (12). The data processing system further includes a plurality of programmable Processing Elements, PEs, (18) organized in multiple clusters (15). Each cluster (15) comprises a multitude of the programmable PEs, the functionality of each programmable Processing Element (15) being defined by internal microcode in a microprogram memory associated with the Processing Element. The multiple clusters of programmable Processing Elements are arranged in a Network on Chip, NoC, (14) connected to the control processor (11), which is provided as a central hub, i.e. a root, for the Network on Chip, and the multiple clusters (15) of programmable Processing Elements being arranged at peripheral nodes, also being referred to as cluster nodes, of the Network on Chip (14).

公开(公告)号：WO2022093938A1

公开(公告)日：2022-05-05

申请号：PCT/US2021/056819

申请日：2021-10-27

Applicant: AMBEENT WIRELESS

Inventor： ERGEN, Mustafa

IPC: G06F13/00 ,  G06F13/12 ,  G06F13/20 ,  H04B1/38 ,  H04L12/28

Abstract: The invention generally relates to a method and system for enabling low-latency data communication by aggregating a plurality of network interfaces, each network interface associated with a different network. The method and system measures in real-time, network performance capabilities associated with the networks via the respective network interfaces. The method and system then assigns two or more multi-threading processors in a multi-processor architecture configured to execute a plurality of threads for processing one or more data streams. The threading in each processor is interlinked with two or more network interfaces based on the measured network performance capabilities and network performance capability requirements of the one or more data streams, thereby enabling threading-based cooperation among multi-core processors in the multi-processor architecture and the plurality of network interfaces. The one or more data streams are then transmitted to the two or more network interfaces and thereon to the associated networks for transport.

公开(公告)号：WO2021248705A1

公开(公告)日：2021-12-16

申请号：PCT/CN2020/112543

申请日：2020-08-31

Applicant: 完美世界（北京）软件科技发展有限公司

Inventor： 孙思远 ,  冯星

IPC: G06F13/20 ,  G06T15/20 ,  H04N1/00 ,  G06T1/20 ,  G06T1/60 ,  G06T3/4023

Abstract: 一种图像渲染方法、装置、计算机程序和可读介质，该方法包括：在内存中创建用于存储渲染数据的内存资源；确定原始图像尺寸，按照预先设置的光栅化比率控制参数，对原始图像尺寸进行缩放，得到物理尺寸；根据物理尺寸，对目标场景进行渲染，结合多重采样抗锯齿技术，对目标场景进行多重采样抗锯齿处理，得到多采样数据以及单采样数据，将单采样数据作为目标场景渲染数据；基于目标场景渲染数据，根据光栅化比率控制参数的映射表还原到逻辑尺寸，输出逻辑尺寸的渲染数据，由此在能够降低渲染图像过程中所需的计算开销的同时，又能够保证渲染图像的图像质量。

公开(公告)号：WO2021224739A1

公开(公告)日：2021-11-11

申请号：PCT/IB2021/053622

申请日：2021-04-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED

Inventor： SYRIVELIS, Dimitrios ,  REALE, Andrea

IPC: G06F13/20 ,  G06F3/06

Abstract: Embodiments for implementing an enhanced network stack framework in a computing environment. A plurality of network buffers coherently attached between one or more applications and a network interface may be shared while bypassing one or more drivers and an operating systems using an application buffer, a circular buffer and a queuing and pooling operation.

公开(公告)号：WO2021061514A1

公开(公告)日：2021-04-01

申请号：PCT/US2020/051446

申请日：2020-09-18

Applicant: ALIBABA GROUP HOLDING LIMITED

Inventor： ZHAO, Chaojun ,  JIANG, Tao

IPC: G06F13/18 ,  G06F13/20 ,  G06F13/24 ,  G06F13/26 ,  G06F15/16

Abstract: The present invention discloses an interrupt controller, including: a sampling unit adapted to receive interrupts from various interrupt sources coupled to the interrupt controller and perform sampling on the received various interrupts; and a priority arbitration unit adapted to classify the received various interrupts into a plurality of interrupt segments, where each interrupt segment includes one or more sampled interrupts, and determine, segment by segment, an interrupt with the highest priority in a selected segment, until an interrupt with the highest priority among all interrupts is identified through arbitration and used as an to-be-responded-to interrupt. The present invention further discloses a processor including the interrupt controller, and a system-on-chip.

公开(公告)号：WO2020085583A1

公开(公告)日：2020-04-30

申请号：PCT/KR2019/001204

申请日：2019-01-29

Applicant: 전자부품연구원

Inventor： 김병수 ,  김동순 ,  김영규 ,  장영종

IPC: G06F13/20 ,  G06F13/16

Abstract: 기존의 상용 메모리 버스를 변형 없이 이용하여 PIM을 운용 할 수 있는 방법 및 이 방법이 적용된 PIM 장치가 제공된다. 본 발명의 실시예에 따른 PIM(processing in memory) 장치는 데이터가 저장되는 메모리; 메모리의 해당 주소에서 데이터를 read 하고 write 하는 메모리 제어장치; 주소, 데이터 및 명령을 수신하는 입출력 장치; 데이터에 대해 명령을 수행하는 연산 장치;를 포함하고, 입출력 장치는, address 신호를 통해, 목적 주소를 수신하고, DQ 신호를 통해, 연산 장치가 수행할 명령, 피연산자 주소 및 데이터가 수록된 패킷을 수신할 수 있다. 이에 의해, 기존 컴퓨터 시스템의 하드웨어 및 소프트웨어의 수정 없이도, PIM을 구현할 수 있으며, 특히 PSRAM을 사용하는 모든 상용 마더보드(motherboard)에서 PIM을 사용할 수 있게 된다.