公开(公告)号：WO2023278331A1

公开(公告)日：2023-01-05

申请号：PCT/US2022/035128

申请日：2022-06-27

申请人： ADVANCED MICRO DEVICES, INC.

发明人： BLINZER, Paul

IPC分类号： G06F9/50 ,  G06F3/0604 ,  G06F3/0635 ,  G06F3/0647 ,  G06F3/0659 ,  G06F3/067 ,  G06F3/0689 ,  G06F9/5044 ,  G06N20/00

摘要： Methods and apparatuses for transferring data from non-volatile memory to process accelerator memory are disclosed. In one embodiment, a process accelerator issues a transfer request for a resource at a host file system. The process accelerator receives, responsive to the transfer request, data from the host file system, wherein the data corresponds to the resource and the process accelerator receives the data directly from the host file system bypassing staging memory of the host. The process accelerator manipulates the data to obtain the resource. Thus, the process accelerator may obtain the resource directly from the host file system to minimize the number of transfers of the data.

公开(公告)号：WO2022115165A2

公开(公告)日：2022-06-02

申请号：PCT/US2021/053778

申请日：2021-10-06

申请人： MICRON TECHNOLOGY, INC.

发明人： BREWER, Tony M.

IPC分类号： G06F12/02 ,  G06F3/06 ,  G06F12/0253 ,  G06F12/0857 ,  G06F13/1668 ,  G06F2212/1024 ,  G06F2212/7205 ,  G06F2213/0038 ,  G06F3/0619 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/4881

摘要： Disclosed in some examples, are methods, systems, machine readable mediums, memory devices, and memory controllers that detect memory hotspots. The system keeps a count of a number of memory accesses that were queued waiting for another memory access to that address to finish. The number of memory accesses may be compared to a hotspot criteria to determine one or more memory hotspots. These hotspots may be sent to a processor, which may store the memory hotspots in a file which may be provided to an administrator.

公开(公告)号：WO2021202405A1

公开(公告)日：2021-10-07

申请号：PCT/US2021/024700

申请日：2021-03-29

申请人： PSIQUANTUM, CORP. ,  PANT, Mihir

发明人： PANT, Mihir

IPC分类号： G06N10/00 ,  G06F11/1004 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0679 ,  G06N3/08 ,  H01L49/006

摘要： A quantum computing system and methods for performing fault-tolerant quantum computing. A fusion controller sequentially performs a series of fusion measurements on different fusion sites of a plurality of fusion sites to obtain a respective series of classical measurement results. The series of fusion measurements is performed on quantum modes of a logical qubit. For respective fusion measurements of the series of fusion measurements, a basis for performing the respective fusion measurement is selected based on classical measurement results of previous fusion measurements. The series of classical measurement results are in the memory medium.

公开(公告)号：WO2021202308A1

公开(公告)日：2021-10-07

申请号：PCT/US2021/024481

申请日：2021-03-26

申请人： MICRON TECHNOLOGY, INC.

发明人： YUDANOV, Dmitri

IPC分类号： G11C7/10 ,  G11C7/06 ,  G11C7/12 ,  G11C8/08 ,  G06F7/498 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0673 ,  G06F7/5443 ,  G06N3/08

摘要： The present disclosure is directed to systems and methods for a memory device such as, for example, a Processing-In-Memory Device that is configured to perform multiplication operations in memory using a popcount operation. A multiplication operation may include a summation of multipliers being multiplied with corresponding multiplicands. The inputs may be arranged in particular configurations within a memory array. Sense amplifiers may be used to perform the popcount by counting active bits along bit lines. One or more registers may accumulate results for performing the multiplication operations.

公开(公告)号：WO2021150805A1

公开(公告)日：2021-07-29

申请号：PCT/US2021/014494

申请日：2021-01-22

申请人： INFINEON TECHNOLOGIES LLC

发明人： YOGEV, Yoav ,  GIVANT, Amichai ,  SOFER, Yair ,  ROCHMAN, Amir ,  SHETTY, Shivananda ,  SINGH, Pawan

IPC分类号： H03K21/40 ,  G11C16/04 ,  G06F3/0604 ,  G06F3/0652 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0679

摘要： Systems, methods, and devices include counters configured to implement count operations. Systems include non-volatile memory devices which include a first counter configured to store a first plurality of data values representing a plurality of count operations, and a second counter configured to store a second plurality of data values representing a number of erase operations applied to the first counter. Systems further include control circuitry configured to implement read, write, and erase operations for the first counter and the second counter, determine a partial count value based, at least in part, on a current value of the second counter and at least one physical parameter of the first counter, and generate a count value by adding the partial count value with a current value of the first counter. Such counters and control circuity are immune data loss due to power loss events.

公开(公告)号：WO2021141695A1

公开(公告)日：2021-07-15

申请号：PCT/US2020/061893

申请日：2020-11-24

申请人： MICROSOFT TECHNOLOGY LICENSING, LLC

发明人： MAGILL, Kevin Neal ,  ROBINSON, Eric Francis ,  BACHAND, Derek ,  PANAVICH, Jason ,  WILSON, Michael P. ,  MITCHELL, Michael B.

IPC分类号： G06F12/0831 ,  G06F12/0891 ,  G06F2212/1016 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0685 ,  G06F9/30043

摘要： Providing dynamic selection of cache coherence protocols in processor-based devices is disclosed. In this regard, a processor-based device includes a master PE and at least one snooper PE, as well as a central ordering point (COP). The COP dynamically selects, on a store-by-store basis, either a write invalidate protocol or a write update protocol as a cache coherence protocol to use for maintaining cache coherency for a memory store operation by the master PE. The selection is made by the COP based on one or more protocol preference indicators that may be generated and provided by one or more of the master PE, the at least one snooper PE, and the COP itself. After selecting the cache coherence protocol to use, the COP sends a response message to each of the master PE and the at least one snooper PE indicating the selected cache coherence protocol.

公开(公告)号：WO2021130607A8

公开(公告)日：2021-07-01

申请号：PCT/IB2020/061961

申请日：2020-12-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED

发明人： NARAYANAM, Krishnasuri ,  KUMAR, Ken ,  SATYANARAYAN, Dayama, Pankaj ,  KAUL, Akshar

IPC分类号： G06Q40/04 ,  G06F11/1464 ,  G06F11/2094 ,  G06F21/645 ,  G06F3/0611 ,  G06F3/0659 ,  G06F3/067 ,  G06F9/4418 ,  H04L63/12 ,  H04L9/0637 ,  H04L9/3239 ,  H04L9/50

摘要： A method includes receiving blocks of a blockchain from one or more of a neighboring blockchain peer and an ordering service node (284), identifying two or more blocks from among the received blocks that belong to a same slot within the blockchain, validating the two or more identified blocks in parallel via execution of the two or more identified blocks at a same time, and in response to validation of the two or more identified blocks, storing the two or more identified blocks on a local blockchain ledger of a blockchain peer (281, 282, 283).

公开(公告)号：WO2021128889A1

公开(公告)日：2021-07-01

申请号：PCT/CN2020/110412

申请日：2020-08-21

申请人： 浪潮电子信息产业股份有限公司

发明人： 李辉 ,  白战豪

IPC分类号： G06F3/06 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/067

摘要： 一种分布式块存储服务命令处理方法、装置、设备及介质，该方法包括：通过tgtadm获取块存储服务的rbd命令，并对rbd命令进行解析，以得到相应的任务参数，然后将任务参数传送至iscsi target（S11）；通过tgtd开启用于处理与任务参数对应的任务的专用线程，并监视当前任务的实时处理结果（S12）；通过iscsi target将实时处理结果返回给tgtadm，以便tgtadm将实时处理结果显示在人机交互界面（S13）。上述方法将rbd命令上移至了target层，这种情况下，如果需要进行对卷修改、快照回滚等操作，便可以直接在target层完成相关调度即可，无需做卸载再挂载的操作，这样可以节省大量的人力，简化了流程，同时大量的查询命令上移至target层之后，分布式集群减少了许多与业务无关的进程和io流，减轻了集群负载。

公开(公告)号：WO2021127298A1

公开(公告)日：2021-06-24

申请号：PCT/US2020/065781

申请日：2020-12-18

申请人： MICRON TECHNOLOGY, INC.

发明人： SHEPEREK, Michael ,  MUCHHERLA, Kishore Kumar ,  KAYNAK, Mustafa N. ,  RAYAPROLU, Vamsi Pavan ,  LIIKANEN, Bruce A. ,  FEELEY, Peter ,  KOUDELE, Larry J. ,  NOWELL, Shane ,  KIENTZ, Steven Michael

IPC分类号： G11C16/10 ,  G11C7/04 ,  G11C7/02 ,  G11C7/10 ,  G06F3/06 ,  G06F12/10 ,  G06F2212/1041 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0673 ,  G11C16/0483 ,  G11C16/26

摘要： An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with a memory device; initialize a timeout associated with the block family; initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to programming a block residing on the memory device, associate the block with the block family; and responsive to at least one of: detecting expiration of the timeout or determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the block family.

公开(公告)号：WO2021126700A1

公开(公告)日：2021-06-24

申请号：PCT/US2020/064537

申请日：2020-12-11

申请人： MICRON TECHNOLOGY, INC.

发明人： BALB, Markus ,  HEIN, Thomas ,  HOENIGSCHMID, Heinz

IPC分类号： G11C29/56 ,  G11C29/12 ,  G11C29/00 ,  G11C29/50 ,  G01R31/3177 ,  G06F11/0727 ,  G06F11/0754 ,  G06F11/0772 ,  G06F11/0793 ,  G06F11/1072 ,  G06F11/3037 ,  G06F3/0619 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0673

摘要： Methods, systems, and devices for memory health status reporting are described. A memory device may output to a host device a parameter value, which may be indicative of metric or condition related to the performance or reliability (e.g., a health status) of the memory device of the memory device. The host device may thereby determine that the memory device is degraded, possibly prior to device or system failure. Based on the parameter value, the host device may take preventative action, such as quarantining the memory device, deactivating the memory device, or swapping the memory device for another memory device.