公开(公告)号：WO1998019397A1

公开(公告)日：1998-05-07

申请号：PCT/JP1997003904

申请日：1997-10-28

Applicant: YOKOMIZO, Akira

IPC: H03K05/05

CPC classification number: H04L7/02 ,  H03K5/00006 ,  H03K5/1565

Abstract: A waveform shaping circuit from which an input signal, the waveform of which is shaped to a waveform of a duty ratio of 50 % whether the input signal has a duty ratio of 50 % or not, is outputted. A duty ratio determining circuit adapted to receive a timing signal generated in a timing signal generating circuit, and determine and designate a timing position for a duty ratio of 50 % of a clock signal to be outputted is provided, which circuit is constituted by a cycle measuring circuit (10) for measuring the length of one cycle in a first cycle which comes at intervals of integral multiples of one cycle T of an input clock signal EXT-CK, an arithmetic circuit (19) adapted to calculate the length of a half cycle on the basis of a value of the above-mentioned cycle, an actual measuring circuit (20) adapted to execute the measurement of the length of a cycle in each of the second cycles in the above-mentioned intervals, and a coincidence circuit (28) adapted to output a coincidence output as a timing position of the duty ratio of 50 % when the actual measurement value coincides with the above-calculated value, a clock signal having a pulse width corresponding to the duty ratio of 50 % being generated on the basis of a signal synchronous with a leading edge of the input clock signal EXT-CK and the timing position determined and designated in the duty ratio determining circuit (3), the clock signal being then outputted.

Abstract translation: 输出波形整形电路，输入信号的波形成形为占空比为50％的波形，输入信号是否具有50％的占空比。 一种占空比确定电路，其适于接收在定时信号发生电路中产生的定时信号，并且确定并指定要输出的时钟信号的占空比的定时位置，该电路由循环 测量电路（10），用于测量在输入时钟信号EXT-CK的一个周期T的整数倍的间隔中的第一周期中的一个周期的长度;运算电路（19），适于计算一半的长度 基于上述周期的值进行循环，适于在上述间隔中的每个第二周期中执行周期的长度的测量的实际测量电路（20）和符合电路（ 28），其适于在实际测量值与上述计算值一致时输出一致输出作为占空比为50％的定时位置，具有与占空比为50的脉冲宽度的时钟信号 基于与输入时钟信号EXT-CK的前沿同步的信号和在占空比确定电路（3）中确定和指定的定时位置产生％，然后输出时钟信号。

公开(公告)号：WO1988007289A1

公开(公告)日：1988-09-22

申请号：PCT/US1988000253

申请日：1988-01-28

Applicant: HUGHES AIRCRAFT COMPANY

Inventor： HUGHES AIRCRAFT COMPANY ,  UNDERWOOD, George, D.

IPC: H03K05/05

CPC classification number: H03K3/017 ,  H03K5/05 ,  H03K5/131 ,  H03K2005/00234 ,  H03K2005/00254

Abstract: A method and apparatus for obtaining high frequency resolution of a low frequency data signal are provided. The invention comprises a low frequency select logic (27) for generating the data signal having low frequency resolution, low frequency state machine logic (29) for determining whether the data signal is resolved to predetermined high frequency resolution characteristics and circuitry for generating a correction signal to modify the data signal to high frequency resolution, and high frequency logic (17) for modifying the data signal in response to the low frequency correction signal. The high frequency logic (17) operates to selectively modify the path of low frequency data in response to the correction signal to modify the low frequency data signal to obtain high frequency resolution .