摘要:
In various embodiments, an apparatus comprises a composite backplane that modulates light from a light source, where the composite backplane comprises an electronics layer disposed on a substrate, a photonics integrated circuit (IC) layer disposed on the electronics layer that causes light from the light source to propagate in a first direction, and an active light modulation (ALM) interface layer disposed on the photonics IC layer controls an ALM interface layer in order to control the light propagating in the first direction.
摘要:
Devices including a volume containing a ferroelectric nematic liquid crystalline material, a dielectric layer overlying a portion of the volume, and a charge-bearing substrate or layer are disclosed. Methods of forming and using such devices are also disclosed.
摘要:
본 발명에 따른 디스플레이 장치는 기판; 상기 기판 상에 배치되는 반도체 발광소자들; 및 상기 반도체 발광소자들과 전기적으로 연결되도록 상기 기판 상에 배치되는 배선 전극을 포함하고, 상기 기판은, 상기 반도체 발광소자들로 구성되며 복수의 행 및 열로 배치되는 단위 화소 영역들을 포함하며, 상기 단위 화소 영역들은, 상기 반도체 발광소자들이 제1 방향으로 배열된 제1 단위 화소 영역; 및 상기 제1 단위 화소 영역과 인접 배치되며, 상기 반도체 발광소자들이 제2 방향으로 배열된 제2 단위 화소 영역을 포함하는 것을 특징으로 한다.
摘要:
A display panel having an inter-subpixel region IR and a subpixel region SR is provided. The display panel comprises a first display substrate (10) and a second display substrate (20) facing each other, and a spacer layer (06) having a plurality of spacers for maintaining a spacing between the first display substrate (10) and the second display substrate (20). The first display substrate (10) comprises a first base substrate (01), and a black matrix (04) in the inter-subpixel region IR and on the first base substrate (01) the black matrix (04) comprises a linear polarizer layer (041) in a first region of the inter-subpixel region IR and outside the subpixel region SR. An orthographic of the linear polarizer layer (041) on the first base substrate (01) substantially covers projections of the polarity of spacers on the first base substrate (01).
摘要:
Display backplane comprising two pairs of stacked data lines sandwiching pixel electrodes (130), wherein each pair of stacked data lines comprises a lower data line (110) and an upper data line (120) stacked on the lower data line (110), so that the charging time for writing the data signals can be reduced without reducing the pixels' apertures, and wherein the left and right edge (131A, 131B) of each pixel electrode (130) is separated from the respective adjacent lower data line (110) by the same distance so that the parasitic capacitances between the pixel electrode (130) and the two adjacent data lines (110) are substantially equal to each other.