US09584469B2
An information processing apparatus is connectable to an external network, and includes a plurality of units, an external network interface, and an internal network interface. The external network interface is provided in at least one of the plurality of units, and connected to the external network. The internal network interface is provided in each of the plurality of units, and is connected to an internal network which is established by a second address system independent from a first address system of the external network connected to the external network interface. Then, the internal network interface of each of the plurality of units conducts communication between the plurality of units using the second address system. Therefore, the internal network having no influence on the external network can be established.
US09584465B2
Techniques to optimize messages sent to a user of a social networking system. In one embodiment, information about the user may be collected by the social networking system. The information may be applied to train a model for determining likelihood of a desired action by the user in response to candidate messages that may be provided for the user. The social networking system may provide to the user a message from the candidate messages with a selected likelihood of causing the desired action.
US09584462B1
A system for managing email failure notification. The system comprises a data store to store message identifiers for sent emails and a local server computer. The local server computer comprises an analyzer application stored in the memory that, when executed by the processor, analyzes an email return notification comprising information about a failed email, wherein the analyzer application obtains the email return notification via the return path address defined in the return path attribute, reads an entry from the data store based on a message identifier in the email return notification, and updates the entry based on the message identifier. The local server computer further comprises a resolution application stored in the memory that, when executed by the processor, reads entries from the data store associated with failed emails, builds a table on a website with failed email information, and maintains statistics for failed emails.
US09584460B2
A computer-implemented method receiving receives information describing a current or future activity from a user of a computing system via a mobile device. The current activity is an activity occurring at a current time when the information is received, while the future activity is an activity occurring at a future time relative to a time when the information is received. The method transmits the information describing the current or future activity to a backend database coupled to the Internet and remote from the mobile device. The information describing the current or future activity is accessible to at least one recipient having access privilege to information associated with the user and describing the current or future activity via the Internet.
US09584459B2
A computer-implemented method receiving receives information describing a current or future activity from a user of a computing system via a mobile device. The current activity is an activity occurring at a current time when the information is received, while the future activity is an activity occurring at a future time relative to a time when the information is received. The method transmits the information describing the current or future activity to a backend database coupled to the Internet and remote from the mobile device. The information describing the current or future activity is accessible to at least one recipient having access privilege to information associated with the user and describing the current or future activity via the Internet.
US09584458B2
Embodiments of the present invention provide methods, computer program products, and systems for selecting subsets of participants in electronic message threads. Embodiments of the present invention can be used to exclude participants based, at least in part, on activity level from message conversations, thereby streamlining message conversation and reducing unwanted message communications.
US09584453B2
A technique for contact list aggregation across networks involves logging into low level networks through a high level network. A system constructed according to the technique may include a network interface coupled to the different low level networks. The system may further include a contact aggregation engine coupled to the network interface and a network contacts database. In operation the system logs into one or more of the low level networks (or facilitates login for a user). To the extent that the data in the network contacts database is not current, the contact aggregation engine updates the networks contacts database contact information, then provides an aggregated contact list including the contact information to a display device. A method according to the technique may include logging into a high level network and displaying contacts from the one or more low level networks in an aggregated contact list. The method may further include logging into the one or more low level networks.
US09584452B2
A method comprising: executing an operation on a file; obtaining a mail editing task list; determining at least one mail editing task; and sending an attachment adding instruction to a mail editing apparatus that generates the mail editing task to instruct the mail editing apparatus to add the file as an attachment of a mail corresponding to the mail editing task. Through the embodiments of the present invention, when a user executes an operation on a file, a current mail editing task list can be automatically obtained, and the file is used as an attachment of a mail corresponding to at least one determined mail editing task.
US09584451B2
A system, method and apparatus are provided for secure e-mail message attachment optimization. Content attached to e-mail messages may not be suited to the resource constraints of the destination wireless device. In secure e-mail messages, the message may be signed and/or encrypted. A wireless server can determine resource parameters associated with a destination wireless device, such as display resolution, memory capacity, processor speed, and wireless interface constraints and re-scale the attached content to be optimized for delivery and presentation on the wireless device.
US09584448B2
An instant messaging user may use a buddy list that includes a user-selected list of potential instant messaging recipients (“buddies”) to identify another instant messaging user with whom instant messages are to be exchanged. An instant messaging user also may use a buddy list for other purposes, such as to initiate playing of an on-line game or to invite participants to play an on-line game. Techniques are provided to transform a buddy list from one messaging-mode to another messaging-mode. The transformation may include, for example, substitution or re-ordering of groups of buddies, substitution of buddy icons associated with buddies, substitution of information displayed about buddies, and substitution of controls for directing operation of the buddy list.
US09584446B2
The present invention is directed to a method and system of memory management that features dual buffer rings, each of which includes descriptors identifying addresses of a memory space, referred to as buffers, in which portions of data packets are stored. Typically, the header segment of each data packet is stored at a first set of a plurality of buffers, and the portion of the payload segment that does not fit among the buffers of the first set is stored in the buffers of a second set. In this manner, the size of the individual buffers associated with the first buffer rings may be kept to the smallest size of useable storage space, and the buffers corresponding to the second buffer ring may be arbitrary in size.
US09584443B2
The present invention discloses methods and systems for processing data packets received at a first network node and for processing encapsulating packets received at a second network node. The first network node receives data packets from its network interface. It then selects a first tunnel and selects none or at least one second tunnel according to a selection policy. Original encapsulating packets (OEPs) are transmitted to a second network node through the first tunnel and at least one duplicate encapsulating packet (DEP) is transmitted through the at least one second tunnel. The second network node receives an encapsulating packet with a global sequence number (GSN) through an aggregated connection. The second network node determines whether one or more data packets corresponding to the encapsulating packet have been received earlier. The second network node may then determine whether or not to forward the one or more data packets.
US09584440B1
Some embodiments provide a real-time distributed tree (RDT) comprising scalability, protocol, and data layers for dynamically and in real-time defining and implementing customer applications over cloud operator resources. The RDT is a tree structure with customer branches comprising nodes hierarchically organizing domains, domain applications, and application rooms. Service layer service nodes can be linked to any customer branch node. Linking service nodes to the customer node reserves services represented by the service nodes for allocation to or scaling of any customer application or room under that customer branch. Linking service nodes to an application node or room node allocates the corresponding services to the application or room. The RDT moves linkages to maximize service usage and minimize wasted allocation. Protocol layer nodes modify signaling or messaging of the services implementing a customer application. Data layer nodes provide customizable four-dimensional storage of activity occurring anywhere in the customer branch.
US09584439B2
In one embodiment, a cloud computing system provides user extensibility by providing a plugin interface for major systems. Plugin interfaces for a compute service, object service, network service, authentication and authorization service, message service, and image service are disclosed. One or more of the plugin interfaces can be used to alter the allocation of virtual to physical resources across multiple services. Compound services and smart allocation facilities are possible with user-directed modification.
US09584438B2
Systems and methods for handling idle websites on a Web server are disclosed. The duration between requests for a website application is monitored and compared to an idle time-out value. The idle time-out value may be a user-selected value that is the same for all website applications or an idle time-out value selected for a group of worker processes. When the idle time-out value is reached, all inactive memory allocations for the website application are paged-out. When a request for the website application is later received, memory for the website application is paged-in so that the request can be processed.
US09584436B1
In general, embodiments of the invention relate to a method and system for managing network access for applications. More specifically, embodiments of the invention provide mock Internet Protocol (IP) addresses to the applications, where the applications may use the mock IP addresses to communicate with other systems (e.g., other computing devices, the management service, or any other system that is accessible via the network). Each mock IP address may be associated with one or more policies, where the policies dictate how packets that includes the mock IP address are processed. In one or more embodiments of the invention, the mock IP addresses may be used to maintain a class of service (CoS) between applications executing on the computing devices and an application service provider (ASP).
US09584432B2
A method of processing first and second record packets of real-time information includes computing for each packet a deadline interval and ordering processing of the packets according to the respective deadline intervals. A single-chip integrated circuit has a processor circuit and embedded electronic instructions forming an egress packet control establishing an egress scheduling list structure and operations in the processor circuit that extract a packet deadline intervals, place packets in the egress scheduling list according to deadline intervals; and embed a decoder that decodes the packets according to a priority depending to their deadline intervals.
US09584431B2
Methods to achieve bounded router buffer sizes and Quality of Service guarantees for traffic flows in a packet-switched network are described. The network can be an Internet Protocol (IP) network, a Differentiated Services network, an MPLS network, wireless mesh network or an optical network. The routers can use input queueing, possibly in combination with crosspoint queueing and/or output queueing. Routers may schedule QoS-enabled traffic flows to ensure a bounded normalized service lead/lag. Each QoS-enabled traffic flow will buffer O(K) packets per router, where K is an integer bound on the normalized service lead/lag. Three flow-scheduling methods are analyzed. Non-work-conserving flow-scheduling methods can guarantee a bound on the normalized service lead/lag, while work-conserving flow-scheduling methods typically cannot guarantee the same small bound. The amount of buffering required in a router can be reduced significantly, the network links can operate near peak capacity, and strict QoS guarantees can be achieved.
US09584430B2
The disclosure relates to a traffic scheduling device for scheduling a transmission sequence of data packets, stored in a plurality of traffic flow queues, an eligibility state of each of the traffic flow queues for the scheduling is being maintained in a hierarchical scheduling database describing a relationship among the plurality of traffic flow queues. The traffic scheduling device includes: a plurality of interconnected memory cluster units. Each memory cluster unit is associated to a single or more levels of the hierarchical scheduling database and each memory cluster unit is coupled to at least one co-processors. At least one co-processor is software-programmable to implement a scheduling algorithm. The traffic scheduling device also includes an interface to the plurality of traffic flow queues.
US09584429B2
A method for communication includes storing packets received from a sending node over a communication link in a receive buffer of a receiving node. The receive buffer includes one or more blocks having a first block size. A first credit count, corresponding to a number of available blocks in the receive buffer, is derived. The first credit count is converted to a second credit count so as to represent an available space in the receive buffer in accordance with a second block size, which is different from the first block size. A transmission rate of the sending node is controlled by publishing the second credit count to the sending node over the communication link.
US09584427B2
Systems and methods of providing fine grained control over MSS values of transport layer connections. A device intermediary to a plurality of clients and a plurality of servers can identify a first MSS value based on a MTU value of a VLAN interface responsive to a request to establish a transport layer connection. Device determines that a MSS value of the VLAN is less than the first MSS value. Device updates, responsive to the determination, the first MSS value to a second MSS value corresponding to the MSS value of the VLAN. Device determines that an MSS value specified by a profile configured for a virtual server of the device is less than the second MSS value. Device updates the second MSS value to the MSS value of the profile responsive to determining that the MSS value specified by the profile is less than the second MSS value.
US09584425B2
After sending M consecutive DUP ACKs, M generally being three, the TCP receiver generates DUP ACKs every N packets, with N greater than one, with the eventually transmitted DUP ACK containing SACK information. After receiving the third DUP ACK the TCP transmitter uses the positive acknowledgements provided in the SACK information in the TCP header to inflate the congestion window. With the reduced DUP ACKs from the TCP receiver to the TCP transmitter, the impact of TCP DUP ACKs on the data rate from the TCP receiver to the TCP transmitter is substantially reduced.
US09584418B2
Embodiments of the invention relate to providing quantized congestion notification (QCN) in networks. One embodiment includes a method that includes determining a traffic flow congestion by a particular congestion point (CP) unit of multiple CP units that communicate with at least one end unit, at least one reaction point (RP) unit and at least one controller in a network. A first congestion notification message (CNM) and a second CNM are generated by the particular CP unit. The particular CP unit sends the first CNM directly to the controller and the second CNM directly to the RP unit. Traffic flow is managed among the multiple CP units by the controller based on the first CNM.
US09584411B2
A power save unit of a first network device determines a sleep duration associated with a sleep mode of a low-power network device based on an exchange of information between the first network device and the low-power network device of a communication network. The power save unit determines whether the low-power network device is in the sleep mode. In response to determining that the low-power network device is in the sleep mode, the power save unit redirects network packets destined to the low-power network device to the first network device. The first network device stores the redirected network packets and notifies the low-power network device that the first network device has stored the redirected network packets.
US09584410B2
The present invention relates to a Layer 2 adapter selecting system, including a Layer 3 packet requirements extracting module, a destination Layer 2 address acquiring module, a Layer 2 adapter metric acquiring module, an appropriate Layer 2 adapter identifier selecting module, a packet caching module and a packet scheduling module; wherein the packet caching module is configured to cache a received Layer 3 packet; the Layer 3 packet requirements extracting module is configured to read the Layer 3 packet and extract the type and a parameter value of the requirements; the Layer 2 adapter metric acquiring module is configured to acquire instant metric parameter values of each of the adapters; the appropriate Layer 2 adapter identifier selecting module calculates an adapter identifier and a Layer 3 packet metric; the destination Layer 2 address acquiring module is configured to acquire a Layer 2 address of each of the adapters associated with a destination Layer 3 address; and the packet scheduling module calls an external Layer 2 adapter driver, and the Layer 2 adapter driver completes packaging and sending of the packet. The present invention may solve the problem of resource waste of multiple links, so that the multiple links may be used dynamically in parallel.
US09584407B2
Systems and techniques are described for a path maximum transmission unit (MTU) discovery method that allows the sender of IP packets to discover the MTU of packets that it is sending over a conduit to a given destination. The MTU is the largest packet that can be sent through the network along a path without requiring fragmentation. The path MTU discovery method actively probes each sending path of each conduit with fragmentation enabled to determine a current MTU and accordingly increase or decrease the conduit MTU. The path MTU discovery process is resilient to errors and supports retransmission if packets are lost in the discovery process. The path MTU discovery process is dynamically adjusted at a periodic rate to adjust to varying network conditions.
US09584405B2
A method and server system for providing application layer session routing based on network element availability. A server system (12, 18) is arranged to monitor the abilities of session control edge nodes (21A-D) within a large VoIP and Multimedia transit network (20) to handle session set-up requests. A status module (38) in the server system receives status messages (22, 24) from the edge nodes and based on these messages a selection and modification module (40, 41) selects which edge nodes (21A-D) as well as which of their associated interconnects to other networks to include in a response (5) to a routing request (4) from a source node (21A-D).
US09584398B2
Methods and apparatus to utilize route parameter sets for exchanging routes in a communication network are disclosed. An example method to exchange routes in a communication network disclosed herein comprises receiving a route comprising a route identifier identifying the route and a plurality of route parameter values characterizing the route, and sending the route identifier and a pointer to forward the route to a recipient in the communication network, the pointer being associated with a route parameter set comprising the plurality of route parameter values.
US09584395B1
Techniques for adaptive metric collection, metric storage, and alert thresholds are described. In an approach, a metric collector computer processes metrics as a collection of key/value pairs. The key/value pairs represent the dimensionality of the metrics and allows for semantic queries on the metrics based on keys. In an approach, a storage controller computer maintains a storage system with multiple storage tiers ranked by speed of access. The storage computer stores policy data that specifies the rules by which metric records are stored across the multiple storage tiers. Periodically, the storage computer moves database records to higher or lower tiers based on the policy data. In an approach, a metric collector in response to receiving a new metric, generates a predicted metric value based on previously recorded metric values and measures the deviation from the new metric value to determine whether an alert is appropriate.
US09584389B2
A method and system for resource management is provided. The method includes generating a physical server pool. Resources of the physical server pool and additional resources of additional physical server are monitored and monitored data is retrieved during the monitoring. A utilization rate of the additional physical server pools is determined to be less than a threshold value. In response a group of physical servers is migrated to a free server pool. The physical server pool is determined to need an additional server and each physical server pool is rated based on a calculated chance for required usage. A first physical server is allocated to the physical server pool.
US09584384B2
A method for retransmitting reverse link data practiced by a media access control layer, the method comprising: buffering a plurality of data frames encapsulated in a first access probe in a memory; obtaining information regarding data frames encapsulated in the first access probe that are successfully decoded by a telecommunication network; selecting the buffered data frames that are required to be retransmitted, according to the obtained information; and passing down the selected data frames to a physical layer, to encapsulate the selected data frames into a second access probe and transmit the second access probe to the telecommunication network.
US09584376B2
A framework supporting content delivery includes a plurality of devices, each device configured to run at least one content delivery (CD) service of a plurality of CD services. The plurality of CD services include services supporting content delivery.
US09584366B2
A system for controlling configuration settings for mobile data communication devices and services includes a redirection server and a policy generation system. The redirection server detects a triggering event in a host system and in response to the triggering event continuously redirects data items from the host system to a wireless network. Each mobile data communication device receives data items from the wireless network and includes a device configuration stored in a memory location on the mobile data communication device. The device configuration of each mobile data communication device controls one or more functions of the mobile data communication device. The policy generation system receives a policy setting from a user interface and stores the policy setting in a user information record associated with a mobile data communication device. The redirection server detects the policy setting in the user information record and in response to detecting the policy setting transmits the policy setting over the wireless network to the mobile data communication device associated with the user information record. The mobile data communication device automatically modifies the device configuration to include the policy setting. Methods of controlling a configuration setting in mobile data communication devices are also disclosed.
US09584359B2
A method begins by a set of distributed storage and task (DST) execution units receiving a set of partial tasks and data, where a partial task of the set of partial tasks includes a common task and a unique partial sub-task. The method continues with the set of DST execution units executing the common task on the data to produce a set of preliminary partial results. The method continues with a first DST execution unit of the set of DST execution units generating first interim data based on the at least some of the set of preliminary partial results. The method continues with the first DST execution unit executing a first unique partial sub-task on at least one of a first portion of the data and the first interim data to produce a first partial result.
US09584355B2
A device and method for estimating a frequency offset of a received signal is provided. The device comprises: a plurality of phase estimation units, each of the plurality of phase estimation units adapted for receiving one of a plurality of data parts of the received signal and estimating a phase caused by the frequency offset from the received data part, wherein the plurality of data parts comprises payload data and known symbols in the received signal. A method for estimating the frequency offset is also provided; and a frequency offset estimation unit for estimating the frequency offset from a plurality of phases estimated by the plurality of phase estimation units.
US09584348B2
Provided is a wireless communication device, including a data processing unit that generates a data packet, and a transmitter unit that transmits the data packet generated by the data processing unit, wherein the data processing unit sets information for use other than an NAV setting to a Duration field in the data packet.
US09584341B2
An interface between an application processor device and a modem device uses virtual local-area network (VLAN) tagging of Ethernet frames. An example modem device includes a first interface circuit configured to communicate with a remote device, a second interface circuit configured to communicate with an application processor circuit , and a processing circuit configured to: provide the application processor circuit with IP-based data communications to and from at least one remote IP network using Ethernet frames exchanged between the application processor circuit and the modem device; provide the application processor circuit with local modem services, using Ethernet frames exchanged between the application processor and the modem device; and distinguish between Ethernet frames for the local modem services and Ethernet frames for the IP-based data communication to and from the remote IP network using differing VLAN identifiers attached to or included within the respective Ethernet frames.
US09584336B2
A method for providing wireless access to one or more wireless devices using an automation system control panel is described. In one embodiment, a communication link is established between an automation system control panel and one or more automation components. Settings are applied to configure the automation system control panel for use as a wireless access point providing two-way communication with one or more electronic devices. Applying settings includes receiving input directly at a graphical user interface of the automation system control panel, the graphical user interface further providing access to control the one or more automation components. The automation system control panel is wirelessly connected to one or more electronic devices via a wireless access point interface using the settings applied at the graphical user interface.
US09584332B2
A message processing method and device, the method comprises: allocating a node to an input message in a cache space for saving the message, and taking the location corresponding to the cache space as index information of a descriptor of the message; and extracting the descriptor information of the message; framing and saving the descriptor information and node information of the message in a node linked list. The abovementioned solution can achieve uniform memory of unicast and multicast messages, and the descriptor linked list corresponds to the packet entity caching resource, thereby significantly reducing the overheads for managing the unicast and multicast messages, so as to improve the node aggregation capability.
US09584330B2
The present invention proposes a method for generating a real time billing information in a packet switching based network and a network element for implementing Interworking between a circuit switching based network and a packet switching based network, wherein a call is set up between a user of said packet switching based network and a user of a circuit switching based network, and a billing server is informed of at least a billing rate and an interval of billing, said method for generating a real time billing information comprising: generating a first message with a first token indicating the billing rate upon receiving a first charge message containing said billing rate from said circuit switching based network and based on said first charge message, and the billing server is informed of said billing rate; once said call having been set up, generating a second messages with a second token indicating the interval of billing upon receiving a subsequent charge message containing said interval of billing and based on said subsequent charge message, and the billing server is informed of said interval of billing; and generating a real time billing information by said billing server.
US09584329B1
Approaches for using a physically unclonable function (PUF) are described. A selector map is used to indicate stable and unstable bits in a PUF value that is generated by a PUF circuit. The stable bits of the PUF value generated by the PUF circuit may be selected for use by an application, and the unstable bits ignored.
US09584328B1
A network address includes a predefined portion that identifies a hostname, where the predefined portion is less than all of the network address. A request is received for a secure session at the network address. The hostname is identified from the predefined portion of the network address and a secure session negotiation is made including returning a digital certificate for the identified hostname.
US09584325B1
Systems and methods for scalably provisioning cryptographic devices in a distributed computing environment are described. In some embodiments, a cryptographic interface controller capable of generating a plurality of hardware-emulated cryptographic devices in response to requests is implemented. In some embodiments, a cryptographic interface controller may present hardware-emulated cryptographic devices to computing entities, such as standalone computer systems or virtual computing systems, as standard cryptographic devices, such as through a Universal Serial Bus interface.
US09584323B2
A method, system and computer program product are disclosed for compressing encrypted data, wherein the data is encrypted by using a block encryption algorithm in a chained mode of operation, and the encrypted data is comprised of a set of N encrypted blocks, C1 . . . CN. In one embodiment, the method comprises leaving block CN uncompressed, and compressing all of the blocks C1 . . . CN in a defined sequence using a Slepian-Wolf code. In an embodiment, the data is encrypted using an encryption key K, and the compressing includes compressing all of the blocks C1 . . . CN without using the encryption key. In one embodiment, the compressing includes outputting the blocks C1 . . . CN as a set of compressed blocks CmprC1 . . . CmprCN-1, and the method further comprises decrypting CN to generate a reconstructed block {tilde over (X)}n, and decrypting and decompressing the set of compressed blocks using {tilde over (X)}n.
US09584315B2
An encryption device comprises: a storage module for pre-storing an encryption key which is necessary for encryption processing; a pre-processing function unit which applies a pre-processing function to plaintext which converts an input value which in general may possibly not have a uniform distribution to an output value which has a uniform distribution; and an encryption unit which outputs encrypted text which is obtained by encrypting by order-preserving encryption, using the encryption key, the plaintext to which the pre-processing function is applied, and in which an order is maintained. This pre-processing function adds an arbitrarily selected random number to a value which is obtained by inputting an input value into a cumulative probability distribution function of an integer set with which the input value is associated, and treating same as an output value.
US09584313B2
A streaming one time pad cipher using rotating ports for data encryption uses a One Time Pad (OTP) and an Exclusive Or (XOR) (or other cipher) with a public key channel to encrypt and decrypt OTP data. There is no method in cryptography to thwart the OTP/XOR method and it is proven impossible to crack. The method also rotates the ports of the channels periodically to increase communication obfuscation. Through pre-fetching and cache of OTP data, latency increases from encryption are kept to an absolute minimum as the XOR for encryption and decryption is done with a minimal number of instructions.
US09584312B2
Through use of the technologies of the present invention, one is able to store and to retrieve data efficiently. One may realize these efficiencies by coding the data and storing coded data that is of a smaller size than original data.
US09584310B2
A method of performing a keyed cryptographic operation mapping an input message to an output message, wherein the cryptographic operation includes at least one round including a non-linear mapping function configured to map input data to output data, including: splitting the input data into n split input data, wherein the splitting of the input data varies based upon the value of the input message; inputting each split input data into the non-linear mapping function to obtain n split output data, wherein a combination the n split output data indicates an output data, wherein the output data results when the input data is input to the non-linear mapping function.
US09584303B1
An apparatus, comprising a first sampling circuit configured to sample a clock signal according to a data signal to produce a first sampled signal, a second sampling circuit configured to sample the clock signal according to a delay signal to produce a second sampled signal, and a control circuit coupled to the first sampling circuit and the second sampling circuit, wherein the control circuit is configured to perform a not-and (NAND) operation according to the first sampled signal and the second sampled signal to produce an activation signal for activating a frequency adjustment for the clock signal.
US09584302B2
Existing synchronization methods can be inefficient in hardware-assisted implementations because of the effects of various jittery events. Thus, a method and an apparatus are provided to synchronize a slave device's clock to a master device's clock for a hardware-assisted implementation. The method can include the receipt of three messages. Time differences are determined based on a time extracted from two of the messages and a time of receipt of a different one of the messages. The slave device's clock can be adjusted based on these time differences. Thus, this method, which can include a dynamic weighted average to compute and implement the synchronization, can synchronize the clock of the slave device to the clock of the master device in a faster time interval.
US09584301B2
The invention relates to a periodic communication method between at least one first system (2) and at least one second system (3) by means of a full-duplex synchronous serial link (4), wherein, during a communication period, data are exchanged between the first system (2) and the second system (3), including: at least one message from the first system (2) to the second system (3), at least one message from the second system (3) to the first system (2) and a clock signal, the clock signal being routed by the link (4) over a time interval, the amplitude of which is less than the communication period, the message from the first system (2) to the second system (3) and the message from the second system (3) to the first system (2) both being routed by the link (4) over said time interval.
US09584300B2
The present invention relates to a wireless communication system. More particularly, the present invention relates to a method and an apparatus for a terminal controlling uplink power in the wireless communication system, comprising the steps of: configuring an uplink subframe (UL SF) of a first set and a UL SF of a second set; receiving a downlink control information (DCI) format including a bitmap for indicating transmit power control (TPC) for a plurality of terminals; and controlling transmit power of an uplink channel by using TPC information on the terminals from the bitmap, wherein the TPC information is used for controlling transmit power of an uplink channel transmitted from the UL SF of the first set when the DCI format comprises a first identifier, and the TPC information is used for controlling transmit power of an uplink channel transmitted from the UL SF of the second set when the DCI format comprises a second identifier.
US09584299B2
One embodiment of the present disclosure relates to a method for random access in a UE in an out-of sync status. The method comprises: sending to a base station a first message including a random access preamble according to a TDD configuration in a SIB; receiving from the base station a second message including a random access response using the random access preamble according to the TDD configuration in the SIB. Another embodiment of the present invention also relates to corresponding method for random access in a base station. According to an aspect of the present disclosure, there are provided corresponding devices.
US09584298B2
A method and device for transmitting uplink control information in a wireless communication system supporting carrier aggregation and operating in TDD are discussed. The method includes transmitting hybrid automatic repeat request acknowledgements (HARQ-ACKs) feedback bits o(0),o(1),o(2),o(3) on a physical uplink shared channel (PUSCH), wherein the HARQ-ACKs feedback bits corresponds to HARQ-ACK(0), HARQ-ACK(1), HARQ-ACK(2), and HARQ-ACK(3) associated with a first component carrier (CC) and HARQ-ACK(0), HARQ-ACK(1), HARQ-ACK(2), and HARQ-ACK(3) associated with a second CC.
US09584287B2
Provided are a method and an apparatus for transmitting uplink control information performed by a user equipment in a wireless communication system. The method comprises the steps of: receiving a first parameter for indicating whether to simultaneously transmit a first combination of an acknowledgement/negative-acknowledgement (ACK/NACK) and a channel quality indicator (CQI), and a second parameter for indicating whether to multiplex a second combination of an ACK/NACK and the CQI and transmitting same as a second physical uplink control channel (PUCCH) format; and multiplexing the first combination of the ACK/NACK or the second combination of ACK/NACK with the CQI and transmitting same as a first PUCCH format or the second PUCCH format, based on the first parameter and the second parameter.
US09584285B2
Periodic over-the-air channel state information (CSI) reporting to serving cells and one or more non-serving cells via a control channel multi-point attachment is disclosed. The channel state information report may be transmitted based on information indicating how to transmit the channel state information report to the non-serving cell. The information indicating how to transmit the channel state information report may be provided by the serving eNodeB. The information may include a periodicity, offset parameters, timing advance commands, power control commands, and/or an aperiodic report request.
US09584277B2
The present invention relates to a method for transmitting reference signals for measuring a channel in a downlink MIMO (Multi Input Multi Output) system. The method comprises the steps of: configuring, by a base station at which Nt transmit antennas are configured, Nt reference signals for channel measurement, where Nt≧1; and transmitting, by the base station, the Nt reference signals to a use equipment in subframes at a specific cycle. The specific cycle is configured to include more than one subframe.
US09584275B2
A method of receiving, by a base station, a reference signal in a wireless communication system. The method includes transmitting a cell-specific sequence group hopping parameter to a plurality of user equipments (UEs) in a cell. The cell-specific sequence group hopping parameter is used to enable a sequence group hopping for the plurality of UEs in the cell. The method further includes transmitting a UE-specific sequence group hopping parameter to a certain UE, among the plurality of UEs. The UE-specific sequence group hopping parameter is used to disable the sequence group hopping, enabled by the cell-specific SGH parameter, for the certain UE. The method further includes receiving a reference signal, which is generated based on a sequence group number, from the certain UE. The sequence group number is determined by the UE-specific sequence group hopping parameter.
US09584272B2
A first radio network node (110) and a method therein for measuring interference as well as a second radio network node (120) and a method therein for enabling the first radio network node to measure interference are disclosed. The first radio network node (110) obtains (201) configuration information for indicating a designated subframe in which a reference signal for measurement of the interference is to be transmitted by the second radio network node (120). The second radio network node (120) obtains (202) configuration information for configuring a designed subframe for transmission of a reference signal. The first radio network node (110) receives (205), in the designated subframe indicated by the configuration information, the reference signal transmitted by the second radio network node (120). The first radio network node (110) determines (206) a value of the interference based on the reference signal.
US09584271B2
The cognitive radio cell acquires a scheme dividing frequency band resources into a number of sub-bands and corresponding silent period time frequency pattern, when performing silence on the sub-band which the cognitive radio cell works on according to the silence period time position of each sub-band defined in the silent period time frequency pattern, spectrum sensing on corresponding sub-band is implemented by radio spectrum sensing system or cognitive radio cell.
US09584268B2
An apparatus, system, and method are disclosed for device level enablement of a communications protocol. An adapter compatibility module determines an adapter compatibility status for a plurality of host adapters. A positive adapter compatibility status indicates that each host adapter in the plurality of host adapters is compatible with a communications protocol. A processor compatibility module determines a processor compatibility status for one or more processors. The one or more processors coordinate data transfers to and from the plurality of host adapters. A positive processor compatibility status indicates that each of the one or more processors is compatible with the communications protocol. A compatibility summary module determines a compatibility summary for the plurality of host adapters and the one or more processors. The compatibility summary indicates a positive compatibility relative to the communications protocol in response to a positive processor compatibility status and a positive adapter compatibility status.
US09584267B2
The present disclosure relates to an apparatus and method for controlling a downlink (DL) Hybrid Automatic Repeat reQuest (HARQ) timing in a system supporting a TDD-FDD joint operation and an FDD-TDD joint operation environment. A base station transmits a PDSCH and a UE transmits an HARQ response in response to the PDSCH. In the TDD-FDD joint operation, the interval between the PDSCH transmission and the HARQ response may be determined based on an FDD mode configuration when the PDSCH is transmitted through a TDD-based primary serving cell.
US09584265B2
Provided are a method and apparatus for sending Hybrid Automatic Repeat Request Acknowledge (HARQ-ACK) information. The method includes: when a terminal employs a physical uplink control channel (PUCCH) format 3 to transmit HARQ-ACK information and the HARQ-ACK information is transmitted over a uplink physical shared channel (PUSCH), determining the number of downlink subframes for serving cells to feed back the HARQ-ACK information; determining the number of encoded modulated symbols required for sending the HARQ-ACK information according to the determined number of downlink subframes; and mapping the HARQ-ACK information to be sent to the PUSCH of a specified uplink subframe according to the number of encoded modulated symbols and sending the HARQ-ACK information. The technical solutions provided by the disclosure are applied to improve the performance of the HARQ-ACK information, and thus improve the data performance.
US09584264B2
Provided is a radio communication device which can make Acknowledgement (ACK) reception quality and Negative Acknowledgement (NACK) reception quality to be equal to each other. The device includes: a scrambling unit (214) which multiplies a response signal after modulated, by a scrambling code “1” or “e−j(π/2)” so as to rotate a constellation for each of response signals on a cyclic shift axis; a spread unit (215) which performs a primary spread of the response signal by using a Zero Auto Correlation (ZAC) sequence set by a control unit (209); and a spread unit (218) which performs a secondary spread of the response signal after subjected to the primary spread, by using a block-wise spread code sequence set by the control unit (209).
US09584258B2
A digital broadcasting system which is robust against an error when mobile service data is transmitted and a method of processing data are disclosed. The mobile service data is subjected to an additional coding process and the coded mobile service data is transmitted. Accordingly, it is possible to cope with a serious channel variation while applying robustness to the mobile service data.
US09584256B2
A method for transmitting data over an optical super-channel partitions the data unequally into a set of data streams for transmission over the set of sub-channels of the super-channel, such that a size of a first data stream for transmission over a first sub-channel is different than a size of a second data stream of the data for transmission over a second sub-channel. The method encodes each data stream of the data with an error correction code (ECC) having different ECC rates to produce a set of encoded data streams and transmits concurrently the set of encoded data streams over the set of sub-channels of the super-channel. Accordingly, the method uses an adaptive ECC for optical super-channels, such that a first ECC rate for encoding the first data stream is different than a second ECC rate for encoding the second data stream.
US09584250B2
A received POLMUX signal is rotated by fixed rotation parameters (Rot0, Rot1, Rot2) and the rotated POLMUX signal with optimal signal performance is selected and phase information is derived from both polarities. A pre-filter improves the timing accuracy.
US09584249B2
The station-side terminal apparatus for the optical access network includes: the station-side terminal apparatus; the subscriber-side terminal apparatuses connected to the station-side terminal apparatus via the optical transmission line; the terminal devices to which mutually different wavelengths are assigned; and the communication failure detecting unit. Each of the terminal devices includes the uplink communication state monitoring unit configured to monitor a state of uplink communication for each registered subscriber-side terminal apparatus, on the basis of the input uplink signal, and the downlink communication failure information extracting unit configured to extract information of a state of downlink communication, which is transmitted from the registered subscriber-side terminal apparatus. The communication failure detecting unit detects a failure of the uplink communication and a failure of the downlink communication, on the basis of the state of the uplink communication and the state of the downlink communication.
US09584243B2
Methods, systems, and devices are described for orthogonal modulation of signals using maximal length sequences and Hadamard transforms. Modulation symbols to be transmitted are arranged into sequences indexed from 1 to 2n−1 for some integer n. A constant is added to the beginning of each sequence, which is then multiplied by a Hadamard matrix of size 2n×2n. The resulting sequences will be orthogonal and will have a first value of zero. The first value is discarded, and the sequence are reordered and associated with m-sequences. The signal is then transmitted. A cyclic prefix may also be transmitted. Upon receiving the transmission, a receiver may discard the cyclic prefix or use it for channel equalization. The receiver may then reorder the received signal, insert a zero, apply the 2n×2n Hadamard transform, discard the zero, and order the sequences again according to the index to retrieve the data.
US09584241B2
A process of scheduling stream packets for output from a multiplexing network device involves prioritizing the output of packets first according to stream priority, and within a particular priority, by stream ID.
US09584233B2
The present invention is an in-train information display apparatus that displays, to a passenger, advertisement content delivered from an advertisement-content delivering apparatus, and includes a display unit configured to display the advertisement content, a display monitoring unit configured to photograph a video screen displayed on the display unit, and a display-result determining unit configured to calculate color-related information, which is information concerning a color of the video screen, based on an image photographed by the display monitoring unit, determine, based on the calculated color-related information and reference information for display result determination, which is information concerning a color of the advertisement content normally displayed on the display unit, whether the display of the advertisement content is normally performed, and transmit, as information for display achievement calculation, a result of the determination to the advertisement-content delivering apparatus having a totalizing function.
US09584223B2
A transmitter of optical signals uses a single light transmitter to modulate a multi-carrier signal. The multi-carrier signal is generated by performing digital signal processing in the digital domain to generate a plurality of components by performing Hilbert transform filtering. The components are modulated on to an optical transmitter as in-phase and quadrature components, thereby generating a multi-carrier waveform using a single optical transmitter.
US09584219B2
Systems, methods, and devices are disclosed for monitoring optical communications between a managed location and a remote location. In particular, an optical signal is transmitted over an optical fiber and passed-through a test device. A portion of the optical signal is filtered from the original optical signal and passed to a monitoring unit. The monitoring unit may instruct one or more switches in the test device to loop the optical signal back toward the managed location. Subsequently, testing and monitoring may be performed at the managed location. The device may provide a test output or may transmit the information to the managed location.
US09584218B2
There is proposed a mechanism for monitoring optical fibers (1) in an optical backhaul network that connects nodes (10, 20) of a distributed radio base station system. The nodes carry data streams using the Common Public Radio Interface (CPRI) protocol. The method includes: receiving from at least one node a CPRI alarm indicative of a transmission failure in a CPRI data stream, and triggering fault analysis of an optical fiber identified as carrying the CPRI data stream. Using CPRI alarms that are generated by transmission failures between nodes as a trigger for monitoring the physical fiber carrying the CPRI streams provides a targeted mechanism for determining fiber failures, which had a low response time and thus enables rapid repair of any fault and minimal disruption to the network.
US09584207B2
An embodiment of a method for adaptive multi-antenna selection, executed by an AP (access point), which contains at least the following steps. After a data transmission request or a data receipt request is received from a client station, it is determined whether the client station is the first time connected client station within a predetermined time interval. If the client station is the first time connected client station, a first antenna combination is selected to transmit/receive data with the client station using a first antenna selection procedure. If the client station is not the first time connected client station, a second antenna combination is selected to transmit/receive data with the client station using a second antenna selection procedure.
US09584205B2
The present invention relates to a method for communicating in a network, the network comprising at least a first cell and a second cell including respectively a first primary station having a first antenna array dedicated to the first cell and a second primary station having a second antenna array dedicated to the second cell, for communicating with a plurality of secondary stations.
US09584203B2
The present invention relates to a wireless communication system, and more particularly, to a method and apparatus for efficient feedback in a wireless communication system that supports multiple antennas. According to one embodiment of the present invention, a method for transmitting channel status information, CSI, for a downlink transmission through uplink comprises: generating a rank indicator (RI), a first precoding matrix indicator (PMI), a second PMI anc channel quality indicator (CQI) as the CSI for the downlink transmission; and transmitting at least one of the RI, the first PMI, the second PMI and the CQI according to a predetermined order, wherein, when the RI or the first PMI is dropped, the CSI following the dropped CSI is generated based on a RI or a first PMI transmitted previously, wherein a precoding matrix used for the downlink transmission is determined based on a combination of the first PMI and the second PMI.
US09584197B2
A system is provided comprising: a first wireless cell transmission point with a multiple-input-multiple-output (MIMO) capability; a second wireless cell transmission point with a MIMO capability; and third circuitry in communication with first circuitry of the first wireless cell transmission point and second circuitry of the second wireless cell transmission point. The system is configured such that the first wireless cell transmission point cooperates with the second wireless cell transmission point in connection with a first transmission to a first MIMO-capable portable wireless device, for improving the first transmission. The system is further configured for: receiving first information from the first MIMO-capable portable wireless device; receiving second information from the first MIMO-capable portable wireless device; altering at least one aspect of the first transmission; and transmitting data in connection with the first transmission to the first MIMO-capable portable wireless device.
US09584189B2
A variable effective size magnetic resonator includes an array of resonators each being one of at least two substantially different characteristic sizes and a mechanism for detuning at least one of the resonators from the resonant frequency of the variable effective size magnetic resonator.
US09584181B2
Methods and devices related to channel estimation for a communication system comprising a plurality of communication connections are provided. For channel estimation, test sequences are used having three different elements, for example −1, 0 and +1.
US09584170B2
A broadband superheterodyne receiver. Embodiments include an input for receiving an RF signal including an RF data signal at a carrier frequency. An RF mixer coupled to the input shifts the RF data signal from the carrier frequency to an IF frequency. An IF band pass filter coupled to the mixer has a pass band, and band pass filters the signal near the IF frequency. A spectrum analyzer provides information representative of the spectral characteristics of the received RF signal around the RF data signal at the carrier frequency. An IF controller is coupled to the RF mixer and to the spectrum analyzer. The IF controller: (1) determines an interference-mitigating IF frequency within the pass band of the band pass filter that will result in attenuation of undesired portions of the RF signal, and (2) controls the RF mixer to shift the RF data signal to the interference-mitigating IF frequency.
US09584168B2
A distortion compensator that compensates for nonlinear distortion of an amplifier that amplifies power of a multicarrier signal includes a first compensation unit that performs first distortion compensation to collectively compensate for first nonlinear distortion that occurs in contact with a carrier frequency of the multicarrier signal, and second nonlinear distortion that occurs at a frequency at a predetermined distance from the carrier frequency, and a second compensation unit that performs second distortion compensation to compensate for only the first nonlinear distortion, of the first nonlinear distortion and the second nonlinear distortion.
US09584165B2
Disclosed is a high frequency amplifier which can properly compensate for distortion generated in a power amplifier even when an observation band of a feedback signal is made narrow. The high frequency amplifier includes a data correction unit that corrects transmission data through a digital pre-distortion method, and the data correction unit includes an orthogonalizer that orthogonalizes and outputs respective order components of a polynomial model for the digital pre-distortion method, and a compensator that compensates for a memory effect of the power amplifier for an output of the orthogonalizer.
US09584164B1
A mixer-first receiver operates to generate filtering and analog-to-digital conversion concurrently and adaptively, while removing an LNA before a mixer to enable integration with digital baseband circuits. A plurality of switching capacitor arrays are integrated with a hybrid analog-to-digital filtering component. Switching capacitor arrays of the plurality of switching capacitor arrays can be selectively modified to perform both the filtering operation and the conversion operation together. The same switch capacitors of a switching capacitor array can be utilized in one phase of a clock cycle for the filtering and in another phase of the clock cycle for the conversion.
US09584162B1
Various embodiments for data error recovery in a tape storage system, by a processor device, are provided. In one embodiment, a method comprises, in a tape storage system using an iterative hardware decoder and an iterative microcode decoder, modifying erasure control configuration settings upon rereading a buffered dataset having passed through at least one microcode-initiated iterative decode cycle.
US09584161B2
A transmission device transmitting a polarization-multiplexed optical signal includes: a frame encoder configured to encode an electric signal in accordance with a predetermined frame format; an error correction encoder configured to provide encoded signal data as a result of the encoding by the frame encoder with a predetermined error correction code; and a transmission loss information acquiring part configured to acquire transmission loss information based on a loss that the encoded signal data provided with the error correction code incurs when the encoded signal data is transmitted, from a receiving device as a transmission destination. The error correction encoder adjusts a redundancy of the error correction code given to the encoded signal data, based on the transmission loss information acquired by the transmission loss information acquiring part.
US09584160B2
Example apparatus and methods monitor conditions in a tiered storage system. The conditions monitored may include the availability of different numbers and types of devices including an erasure code based object storage system. The conditions monitored may also include the availability and type of devices available to the erasure code based object storage system. A redundancy policy for storing an item using the erasure code based object storage system may be determined based on the conditions. Erasure codes associated with the item may then be stored in the erasure code based object storage system as controlled, at least in part, by the redundancy policy. The redundancy policy for the erasure codes may be updated dynamically in response to changing conditions on the tiered storage system.
US09584156B1
Techniques for creating a dynamic Huffman table in hardware are provided. In one aspect, a method for encoding data includes the steps of: implementing dynamic Huffman tables in hardware representing a plurality of Huffman tree shapes precomputed from a sample data set, wherein the Huffman tree shapes are represented in the dynamic Huffman tables by code length values; upon receipt of input data, writing symbols and their counts from the input data to the dynamic Huffman tables; calculating a score for each of the dynamic Huffman tables with the symbols and counts from the input data, wherein the score is based on the code length values of the precomputed Huffman tree shapes and the counts from the input data and selecting a given one of the dynamic Huffman tables having a lowest score for encoding the input data. A process for implementing the present techniques in SRAM is also provided.
US09584154B2
Systems and methods for communicating digital data over a group of conductors include encoding data based on electromagnetic parameter values associated with two or more group symbols each having an independent encoding value such that a mathematical function of the encoding values in the group symbols yields a known value and communicating the encoded data by applying signals associated with the electromagnetic parameter values to the group of conductors.
US09584149B2
According to an embodiment, a comparator includes a first transistor, a second transistor, an output stage, and a node group. The first transistor is configured to operate when a first voltage applied thereto exceeds a first threshold value, and is disposed in an input stage. The second transistor is configured to operate when a second voltage applied thereto exceeds a second threshold value and is disposed in the input stage. The output stage is configured to perform voltage switching and output according to the change in the magnitude relationship between the first voltage and the second voltage. The node group is configured to, during a non-operational state in which the first voltage and the second voltage are not compared, vary at least either the first threshold value or the second threshold value.
US09584148B1
The present disclosure provides systems and methods for identifying and reporting failures of an analog to digital (A/D) conversion system. The systems and methods are configured to detect and report a failure of a preamplifier of the A/D conversion system and/or a failure of a A/D converter of the A/D conversion system. A high frequency component can be included in the input of an A/D converter. The A/D converter is configured to output a digital value to the A/D conversion system, wherein the digital value includes the high frequency component of the A/D converter input. The A/D conversion system is configured to determine an output status, including a frequency component and a corresponding amplitude, and to determine a failure of the A/D conversion system based on the determined output status. The A/D conversion system can report a change in, or a failure of, the A/D converter, and can operate or prevent operation of protection elements.
US09584143B2
A modulator for generating a control code in response to a frequency control word is provided. The modulator includes an adder, an accumulator, a next state generation unit, and a code generation unit. The adder generates a frequency error signal by calculating a difference between the frequency control word and the control code. The accumulator generates a phase error signal by accumulating the frequency error signal. The phase error signal includes an integer part and a fractional part. The integer part of the phase error signal is a current state signal. The next state generation unit generates a next state signal according to a characteristic probability distribution determined by the fractional part of the phase error signal. The code generation unit generates the control code in response to the current state signal and the next state signal.
US09584133B2
An oscillator system addresses power supply noise and temperature dependence. The system includes a multi-stage regulator circuit that receives a supply voltage and generates a lower voltage oscillator supply voltage that is less noisy than the supply voltage. A charge pump circuit receives the oscillator supply voltage and the oscillator output signal and supplies the regulator circuit with a boosted voltage. A reference generator circuit supplies a reference signal that is used to determine the oscillator supply voltage. The reference signal varies with temperature and is used to offset the temperature coefficient of the oscillator.
US09584131B2
A programmable device is disclosed which includes: a circuit data setting section configured to set a logical configuration in a processing circuit using first setting information retrieved from a memory; and a communication status monitoring section configured to determine whether communication is established between the processing circuit and a host computer using the setting made by the circuit data setting section. If it is determined that the communication is not established, the circuit data setting section retrieves from the memory second setting information different from the first setting information to again set a logical configuration in the processing circuit on the basis of the second setting information.
US09584127B2
An inverter includes first, second, third, fourth, and fifth transistors, and first and second capacitors. The transistors and capacitors are connected in such way that the reverse conduction of the second transistor is prevented through controlling the gate electrode of the second transistor and maintaining the electrical potential at the gate electrode of the fifth transistor by the second capacitor. The electrical potential at the gate electrode of the fifth transistor is maintained stable when a first clock signal changes from high to low (when the first to fifth transistors are NMOS transistors) or from low to high (when the first to fifth transistors are PMOS transistors), so that the output signal of the inverter may not be affected by a change of the first clock signal, thus enabling the inverter to generate a stable output signal and a display panel comprising the inverter to obtain a better display effect.
US09584124B2
A semiconductor device may include a first channel provided in a first die. The semiconductor device may include a second channel provided in a second die and disposed adjacent to the first channel, and configured to exchange signals and data with the first channel. The first channel and the second channel may receive and output calibration-related signals from and to each other through bonding, and may share calibration start signals. The calibration start signal may be respectively generated in the first channel and the second channel.
US09584122B1
Techniques for charge reuse in an integrated circuit. A processor may include a first logic circuit coupled to a source power supply node, a second logic circuit coupled to a destination power supply node, and a charge reuse circuit that selectively transfers charge from the first logic circuit to the second logic circuit. The charge reuse circuit may include an equalization device that selectively couples the source power supply node to the destination power supply node, and an equalization activation circuit that activates the equalization device in response to detecting assertion of an equalization control signal and further detecting that a voltage differential between the source power supply node and the destination power supply node is above a threshold value. The equalization activation circuit also prevents coupling of either the source power supply node or the destination power supply node to ground during activation of the equalization device.
US09584116B2
Aspects of the disclosure provide a power circuit that includes a first switch circuit in parallel with a second switch circuit. The first switch circuit and the second switch circuit are coupled to a first driving node, a second driving node, a source node and a drain node via interconnections. The power circuit receives a control signal between the first driving node and the second driving node to control a current flowing from the drain node to the source node through the first switch circuit and the second switch circuit. In the power circuit, a first interconnection and a second interconnection of the interconnections are inductively coupled to balance the current flowing through the first switch circuit and the second switch circuit.
US09584110B2
The reference voltage generator may include a reference current generation unit suitable for generating a reference current based on a first power supply voltage and a first ground voltage, a current amount adjustment unit suitable for adjusting a current amount of the reference current generated by the reference current generation unit based on a second power supply voltage and a second ground voltage, and a reference voltage generation unit suitable for generating a reference voltage corresponding to the reference current, of which the current amount is adjusted by the current amount adjustment unit, based on the first power supply voltage and the first ground voltage.
US09584101B2
A small-sized rapid transition Schmitt trigger circuit for use with a silicon-on-insulator process includes: a first NMOS transistor, a first PMOS transistor, a second NMOS transistor, a second PMOS transistor, and a PMOS/NMOS body control circuit; wherein, the PMOS/NMOS body control circuit is configured to, through changing threshold voltages of the first NMOS transistor and the first PMOS transistor, enable different flip-flop threshold voltages for input transitions from high electrical levels to low electrical levels and from low electrical levels to high electrical levels.
US09584099B2
A flip-flop circuit includes a first latch, a second latch, and a trigger stage. The first latch is configured to set a first latch output signal based on a first latch input signal and a clock signal. The second latch is configured to set a second latch output signal based on a second latch input signal and the clock signal. The trigger stage is configured to generate the second latch input signal based on the first latch output signal. The trigger stage is configured to cause the second input signal to have different voltage swings based on the first latch output signal and the second latch output signal.
US09584097B2
In accordance with an embodiment, a switchable capacitance circuit includes a plurality of capacitance-switch cells that each have a capacitance circuit having a capacitance between a first terminal and a second terminal of the capacitance circuit, and a semiconductor switching circuit including a first terminal coupled to the first terminal of the capacitance circuit, a plurality of series connected radio-frequency (RF) switch cells having a load path and a common node. Each of the plurality of series connected RF switch cells has a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the common node. The switchable capacitance circuit also includes a resistance circuit having a first end coupled to the common node and a second end coupled to a control node.
US09584096B2
Apparatus and methods for digital step attenuators are provided herein. In certain configurations, a digital step attenuator (DSA) includes a plurality of DSA stages arranged in a cascade between an input terminal and an output terminal. Each of the DSA stages can be operated in an attenuation mode or in a bypass mode. The DSA further includes an attenuation control circuit, which can be used to control the modes of operation of the DSA stages. The attenuation control circuit can be used to operate the DSA over a plurality of attenuation steps, which can be digitally selectable. To provide low phase shift across the range of attenuation steps, a DSA stage can include one or more phase compensation capacitors used to provide low phase shift and to compensate for a phase difference between the DSA stage operating in the bypass mode and in the attenuation mode.
US09584094B2
A pair of vibrating arms are arranged side by side in a second direction crossing the first direction, base end sides of which in the first direction are fixed to the base, a pair of inclined surfaces are formed in both sides of the base end of the vibrating arm in the second direction, an end portion in the base end side of an inner inclined surface is connected to an end surface in the tip end side of the base, and an end portion in the base end side of an outer inclined surface is connected to an end surface of the base in the second direction, and the base-end side end portion of the outer inclined surface is arranged closer to the tip end side than the base-end side end portion of the inner inclined surface.
US09584093B2
A vibrating device having a number 2N (N is an integer equal to 2 or larger) of tuning fork arms extending in a first direction are arranged side by side in a second direction. Phases of flexural vibrations of the number N of tuning fork arms positioned at a first side of an imaginary line A, which passes a center of a region in the second direction where the number 2N of tuning fork arms are disposed and which extends in the first direction, are symmetric to phases of flexural vibrations of the number N of tuning fork arms positioned at a second side of the imaginary line opposite the first side.
US09584085B2
An amplifying system with increased linearity is disclosed. The amplifying system includes a first gain stage with a first gain characteristic, a second gain stage with a second gain characteristic, and bias circuitry configured to substantially maintain alignment of distortion inflection points between the first gain characteristic and the second gain characteristic during operation. The bias circuitry is configured to further maintain alignment of the distortion inflection points between the first gain characteristic and the second gain characteristic over design corners by providing substantially constant headroom between quiescent bias voltage and turnoff of the first gain stage and the second gain stage. In some embodiments the first gain characteristic is expansive and the second gain characteristic is compressive. In other embodiments the first gain characteristic is compressive and the second gain characteristic is expansive. In some embodiments the first gain stage is configured to provide RF degeneration control of gain.
US09584080B2
A power amplifier structure having: a power divider for dividing power in a signal fed to an input port between a pair of output ports. Each one of a pair of amplifiers has: an input coupled to a corresponding one of the pair of power divider output ports; and an output. A power combiner is provided. Signals at the power divider output ports are fed to the inputs of the pair of amplifiers in a forward direction and then pass through the amplifiers in the forward direction towards the outputs of the pair of amplifiers. Connectors direct the signals at the amplifier outputs to the power combiners, the signal then passing through the power combiner to an output port in a direction opposite to the forward direction.
US09584079B2
There is provided an operational amplifier which is operable as well when an operating voltage decreases without creating a range where a circuit would not operate or reducing circuit gain. High-pass filters 102-105 provide output signals therefrom to bias-set input nodes of differential amplifiers Gm1-Gm4 to a potential within a common-mode range in which the respective differential amplifiers Gm1-Gm4 are operable. In this manner, the respective differential amplifiers Gm1-Gm4 can be operated effectively regardless of the possible decrease in a supply voltage, enabling normal amplifying operation. In addition, reduction in gain due to the reduced operational voltage is avoided. Therefore, it is preferably applicable to the application where digital and analog circuits are loaded together on the same IC chip. When a high-pass filter is required at each input side of two- or more-stage differential amplifiers, a phase compensation method utilizing multiple paths is provided for a lower range of a phase margin created at the low frequency side, enabling normal amplitude operation.
US09584075B2
A method and circuit are provided for implementing enhanced CMOS inverter based optical Transimpedance Amplifiers (TIAs). A transimpedence amplifer (TIA) includes a photo-detector, and the TIA is formed by a first TIA inverter and a second TIA inverter. The first TIA inverter has an input from a cathode side of the photo-detector and the second inverter has an input from an anode side of the photo-detector. A replica TIA is formed by two replica inverters, coupled to a respective input to a first operational amplifier and a second operational amplifier. The first operational amplifier and the second operational amplifier have a feedback configuration for respectively regulating a set voltage level at the cathode side of the photo-detector input of the first inverter and at the anode side of the photo-detector input of the second inverter.
US09584071B2
Envelope power supply circuitry includes power converter circuitry and envelope tracking circuitry. The power converter circuitry is configured to receive an envelope power converter control signal and a supply voltage and provide an envelope power supply signal for an amplifier from the supply voltage and based on the envelope power converter control signal. The envelope tracking circuitry is coupled to the power converter circuitry. In a first mode of operation, the envelope tracking circuitry is configured to provide the envelope power converter control signal such that a gain of the amplifier remains substantially constant over a range of input power provided to the amplifier. In a second mode of operation, the envelope tracking circuitry is configured to limit the dynamic range of the envelope power supply signal.
US09584070B2
Apparatus and methods for envelope tracking are disclosed. In one embodiment, a power amplifier system including a power amplifier and an envelope tracker is provided. The power amplifier is configured to amplify a radio frequency (RF) signal, and the envelope tracker is configured to control a supply voltage of the power amplifier using an envelope of the RF signal. The envelope tracker includes a buck converter for generating a buck voltage from a battery voltage and a digital-to-analog conversion (DAC) module for adjusting the buck voltage based on the envelope of the RF signal to generate the supply voltage for the power amplifier.
US09584066B2
The photovoltaic device comprises a photovoltaic cell (1) assembled with a substrate (2) by way of an assembly interface. The method comprises a step of injecting an electrical current through the photovoltaic cell and a step of acquiring a signal measuring the luminous radiation emitted by the photovoltaic cell (1), by electroluminescence, in response to the injected current. The injection current has a density higher than a preset assembly defect detection current threshold. A step of detecting at least one defect in the assembly interface on the basis of said acquired measuring signal is provided.
US09584065B2
The invention relates to a solar cell structure (10) having at least one transparent photovoltaic cell (42), in particular having a dye solar cell or a thin-film semiconductor cell. It comprises at least one polymer layer (36) which is provided with a fluorescent material, or a mixture of a plurality of fluorescent materials, and covers the at least one transparent photovoltaic cell (42).
US09584060B2
A motor includes a two-layer rotor and a two-layer stator. The two layer rotor includes an A-phase rotor and a B-phase rotor that are stacked together. When θ1 represents, in electric angle, an angle of the B-phase stator relative to the A-phase stator in a clockwise circumferential direction, and θ2 represents, in electric angle, an angle of the B-phase rotor relative to the A-phase rotor in a counterclockwise circumferential direction, θ1+|θ2|=90° is satisfied.
US09584059B2
A motor control system is presented. The motor control system includes a motor controller and a motor driver. The motor controller and motor driver are coupled by an interface which includes a conductor configured to carry both a motor speed control signal from the motor controller to the motor driver and a motor feedback signal from the motor driver to the motor controller. The motor controller provides a motor speed control signal to the motor driver and the motor driver provides a motor feedback signal to the motor controller.
US09584057B2
A control device and a control method can improve a voltage utilization ratio of an inverter for a green car, in which an input DC voltage of the inverter is modulated by a maximum amount into an output AC voltage of the inverter by changing the output AC voltage incapable of being linearly output into a voltage capable of being linearly output. The control method includes steps of: generating a two-phase current command having two phases of a first current command and a second current command; generating a two-phase voltage command having two phases of a first voltage command and a second voltage command; generating a three-phase pole voltage command; modulating the three-phase pole voltage command into a linear output voltage capable of being linearly output; and calculating a voltage gain value, using the two-phase voltage command and an input DC voltage of the inverter.
US09584056B2
A polyphasic multi-coil generator includes a driveshaft, at least first and second rotors rigidly mounted on the driveshaft so as to simultaneously synchronously rotate with rotation of the driveshaft, and at least one stator sandwiched between the first and second rotors. The stator has an aperture through which the driveshaft is rotatably journalled. A stator array on the stator has an equally circumferentially spaced-apart array of electrically conductive coils mounted to the stator in a first angular orientation about the driveshaft. The rotors and the stator lie in substantially parallel planes. The first and second rotors have, respectively, first and second rotor arrays.
US09584052B2
A driving method for a spindle motor and associated driving system and apparatus are provided. The driving method includes the following steps. Plural modulation signals and plural floating phases corresponding to the plural modulation signals are adjusted. A floating period comes immediately after an active period of each of the plural modulation signals according to the plural floating phases. During the floating period, a demagnetization time of the spindle motor is acquired according to a first terminal voltage signal at a first terminal of the spindle motor. If the demagnetization time is not smaller than the threshold time period, the step of adjusting the plural modulation signals is repeatedly done. Whereas, if the demagnetization time is smaller than the threshold time period, after the demagnetization time, a phase of the spindle motor is obtained according to the first terminal voltage signal.
US09584051B2
According to the method of the invention, the estimation of the angular position is obtained by calculating at least one first estimator as solution of a differential algebraic equation whose coefficients depend on electric parameters of the rotating electric machine comprising first and second inductances of a stator respectively along a direct axis and a quadrature axis with respect to a magnetic flux produced by the rotor of the machine, a resistance of a phase winding and the magnetic flux produced by the rotor. The coefficients also depend on a reference voltage of a vector pulse width modulation (10) applied to the stator of the machine, on phase currents and on first derivatives with respect to time of these phase currents. The estimation of the speed of rotation is obtained by calculating a second estimator obtained by a calculation of first derivative of the first estimator with respect to time.
US09584049B2
An H-bridge circuit controls a motor and includes a first series circuit of switching elements and a second series circuit of switching elements connected in parallel to the first series circuit. A motor driving control method includes a step of turning each of the switching elements Q2, Q3 off and turning-on or performing PWM control on the switching element Q1 and also turning the switching elements Q4 on; a step of performing PWM control on Q1; a step of turning off Q1; a step of repeating for a predetermined number of times a first kickback suppression period during which Q2 is turned on and Q4 is turned off and a second kickback suppression period during which Q2 is turned off and Q4 is turned on; and a step of turning Q2 on and turning on or performing PWM control on Q3.
US09584045B2
The present disclosure relates to a controller, a circuit and method for controlling a power converter using pulse width modulation (PWM). At least one logic block (13, 15, 16) of the controller is configured to remove a command (4) which is configured to control the other power semiconductor switch (2) in a half-bridge (1,2) so that the other power semiconductor switch (2) remains in a non-conductive state while an antiparallel diode (6) allows an electric current (5) to pass in one direction, called the diode's forward direction, while blocking current in the opposite direction. In case the diode (6) is conducting instead of the other power semiconductor switch during the duration of the state of the command, the switching command (4) for the latter is omitted. The controller is further configured to modify the dead time interval (Tdead) between switching from the power semiconductor switch (3) to another power semiconductor switch (4) or vice versa in order to avoid a discontinuity in the transfer function (25).
US09584044B2
In some embodiments of the disclosed inverter topologies, an inverter may include a full bridge LLC resonant converter, a first boost converter, and a second boost converter. In such embodiments, the first and second boost converters operate in an interleaved manner. In other disclosed embodiments, the inverter may include a half-bridge inverter circuit, a resonant circuit, a capacitor divider circuit, and a transformer.
US09584041B2
A method and apparatus charge devices using a multiple port power supply. The apparatus can include a power supply. The apparatus can include a first device charging port coupled to the power supply. The first device charging port can receive power from the power supply and output power to a first device. The apparatus can include a second device charging port coupled to the power supply. The second device charging port can receive power from the power supply and output power to a second device. The apparatus can include a device charging port monitor coupled to the first device charging port and coupled to the second device charging port. The device charging port monitor can detect a number of device charging ports in use. The apparatus can include a cable compensator coupled to the device charging port monitor. The cable compensator can select a first cable compensation if one device charging port is in use and can select a second cable compensation if two device charging ports are in use.
US09584038B2
A system and apparatus for power conversion without a connection to ground. In one embodiment, the apparatus comprises an inverter having an enclosure formed from an insulating material, wherein the inverter receives a DC input and generates, from the DC input and without any ground connection, a first AC line voltage carrying output and a second AC line voltage carrying output.
US09584031B2
Embodiments described herein describe a power supply configured to provide power to an output load via a power supply transformer. The power supply includes a controller configured to operate in a configuration state and an operating state. During the configuration state, the controller receives a configuration signal from a sense circuit coupled to the controller and selects one of a plurality of operating modes from the configuration signal. During the operating state, the controller controls a switch coupled to the transformer based on the selected operating mode and a sense signal received from the sense circuit representative of the power provided to the output load by the power supply. When the switch is closed, current flows from a power source through the transformer, and when the switch is open, current is prevented from flowing from the power source through the transformer.
US09584012B2
In one implementation, a voltage boost assembly including a boost converter having a capacitive element arranged at an output, and an inductive element connectable to an electrical supply. The voltage boost assembly also includes a sensor assembly provided to generate a quick-start enable signal in response to detecting that an electrical condition relative to an electrical output of the boost converter has breached a first threshold. The voltage boost assembly further includes a quick-start module responsive to the quick-start enable signal, and configured to drive the boost converter at a relatively high duty-cycle and so that the boost converter delivers an output current that satisfies a second threshold in order to charge the capacitive element arranged at the output.
US09584004B2
A regenerative power supply system and method comprises a dynamo-electric generator, an electric drive motor coupled to the generator, a transmission device coupling the generator to the electric drive motor, and an energy storage device configured to provide a backup power supply to the regenerative power supply system. An electronic control device is configured to control a flow of electricity to the electric drive motor. An energy storage management device is configured to control a flow of electricity between the electronic control device and the energy storage device.
US09584000B2
A method and device of torque generation based on electromagnetic effect is provided. An electromagnetic torque whose direction is opposite to the motor driving direction is generated in a magnetic field when a motor-drive armature winding is adopted based on the electro-magnetic induction principle. Meanwhile, a reverse electromagnetic torque which is reverse to the armature winding with the same magnitude, is applied on a magnet set and is transmitted to an underactuated system so as to provide required torque for the underactuated system. Advantageously, the provided torque is in direct ratio to speed, difficulty in control is significantly reduced, two-stage electromagnetic variable speed can be achieved, the design of the system is simple and reliable with a concise and clear structure, and the device may be employed in a wide variety of applications.
US09583999B2
Provided is a technology for enhancing the reliability of a permanent magnet rotating machine against thermal degradation of a permanent magnet. Specifically, provided is a permanent magnet rotating machine comprising a housing which houses a rotation shaft, a rotor connected to the rotation shaft and configured to rotate together with the rotation shaft, a stator, and permanent magnets fastened to the rotor or the stator; an air intake port provided at one end of the housing and an air exhaust port provided at the other end of the housing, the air intake port and the air exhaust port being configured to allow cooling air to flow through the housing; and a blower for feeding the cooling air to the air intake port; wherein the permanent magnet rotating machine is configured to be driven by magnetic force of the permanent magnets, and among the permanent magnets, a permanent magnet in the air exhaust port side has a higher coercivity than a permanent magnet in the air intake port side.
US09583996B2
A location and retention component is provided for positively locating an overspeed guard and retaining a centrifugal actuator at an optimum positional relationship relative to each other. The system includes a first and second retention element removably engagable to the output shaft of a motor and axially fixable to the shaft at corresponding locations to maintain the optimum positional relationship. The first retention element serves as a positive stop for assembling the overspeed guard on the motor shaft, while the second retention element ensures that the centrifugal actuator is properly placed within the overspeed guard.
US09583995B2
A motor includes a power supplying brush, a brush holder, a choke coil, and a power supplying terminal. The brush holder holds the power supplying brush. The choke coil includes a coil portion having a coil shape, an iron core, a first connecting portion, and a second connecting portion. The iron core is inserted into the coil portion. The iron core is longer than an axial length of the coil portion. The iron core has a projecting portion projecting from the coil portion in an axial direction of the coil portion. The first connecting portion extends from an axial first end of the coil portion. The second connecting portion extends from an axial second end of the coil portion. The power supplying terminal is assembled to the brush holder. The power supplying terminal connects with at least one of the first connecting portion and the second connecting portion. At least one of the power supplying terminal and the brush holder includes an iron core holding portion that holds the projecting portion.
US09583994B2
Disclosed is a motor, the motor according to an exemplary embodiment of the present disclosure including a rotation shaft having an alignment groove at a distal end of one side from a rotation center, a sensing magnet disposed at the distal end of one side of the rotation shaft by being mounted on the alignment groove of the rotation shaft, a rotor including a magnet coupled to a periphery of the rotation shaft, and a stator including a core wrapping an ambient of the rotor and wound with a coil.
US09583992B2
A command procedure for an active magnetic bearing, the magnetic bearing comprising a series of electromagnetic actuators forming a stator, each actuator being suitable for exerting radial force on the rotor, a ferromagnetic body forming a rotor, kept free of contact between the electromagnetic actuators and suitable for being set in rotation around an axis of rotation, the rotor being suitable to undergo precession movements in particular. Sensors suitable for detecting radial displacements of the rotor and issuing position signals representative of the radial position of the rotor in relation to the actuators. Calculation of at least one actuator command signal the calculation of the command signal consisting of the application of at least one transfer function to the position signals, the transfer function containing a number of correction coefficients.
US09583991B2
A machine is provided including magnetic radial bearings to magnetically levitate a rotating shaft. Each of the magnetic radial bearings includes stator magnet groups. Each of the stator magnet groups includes stator magnets. Each of the stator magnet groups is operatively configured to fully support the rotating shaft independently of each other stator magnet group of the stator magnet groups so that the machine continues to operate with the failure of one or more components of the machine.
US09583982B2
An axial flux stator includes a plurality of magnetically permeable members, a plurality of windings, a back iron, and an encasing. The plurality of windings is associated with the plurality of magnetically permeable members to produce a plurality of winding-magnetically permeable member assemblies. The back iron is mechanically butt joint coupled to the plurality of winding-magnetically permeable member assemblies. The encasing maintains the butt joint coupling of the back iron to the plurality of winding-magnetically permeable member assemblies.
US09583981B2
An armature assembly comprising an armature body and a number of armature ring segments mounted on the armature body, wherein the armature assembly comprises a number of insertion interface elements and a number of complementary receiving interface elements for mounting an armature ring segment onto the armature body; whereby an insertion interface element is realized to engage with a complementary receiving interface element in a direction essentially parallel to a rotation axis of the armature; and wherein an insertion interface element is formed as an integral part of the armature body or as an integral part of an armature ring segment. A method of assembling an armature is also described, and a wind turbine comprising such an armature assembly is provided.
US09583979B2
A system comprises a fixture and a controller that is configured to power the fixture from an alternating current (AC) source and a direct current (DC) source. The controller is configured to automatically switch from powering the fixture from the DC source to powering the fixture from the AC source in response to a time of day. Related systems, methods and computer program products are described.
US09583977B1
A back-up lamp light system has a portable light that is configured to be detachably attached to a lamp and is configured to automatically turn on in the event of a power outage. The portable light is configured to be retained by a mounting bracket to a lamp. The portable light may be detached from the mounting bracket and used as a flashlight. A portable light has a main light and a night light configured on opposing ends of the portable light. A back-up lamp light system may have a light level sensor that is configured to automatically turn on the nightlight in the event of a light level being detected below a threshold value. A back-up lamp light system may be portable and have a separate power cord or may be integral and have a power cord that extends through the interior of a lamp.
US09583963B2
Provided is a source-target structure matching controlling apparatus and method that may perform matching control of a source-target structure while resonance power is transmitted and received through the source-target structure. The source-target structure matching controlling apparatus may include a target resonator to receive, from a resonance power transmitter, the resonance power through a magnetic-coupling, and a rectifier to rectify the resonance power to generate a DC voltage, and provide the DC voltage to a load. The source-target structure matching controlling apparatus may detect an impedance of the load and a variance in the impedance, and may transmit, to the resonance power transmitter, information associated with the variance in the impedance of the load.
US09583958B2
A voltage detecting device includes a voltage detecting circuit configured to detect voltages of a plurality of battery cells constituting a battery; a plurality of voltage detecting lines connecting the respective battery cells to the voltage detecting circuit; discharging circuits connecting the respective voltage detecting lines to a ground, and discharging the battery cells in an overcharged state; a power adjusting section adjusting power of the battery, and supplying the voltage detecting circuit with the adjusted power as driving power; the voltage detecting circuit detecting the voltages of the respective battery cells via the voltage detecting lines; and an overvoltage protecting circuit protecting the voltage detecting circuit from voltage equal to or higher than a predetermined threshold value, the voltage being generated in the voltage detecting lines, the discharging circuits, and the power adjusting section.
US09583957B2
Introduced are a cell balancing integrated circuit which may be realized including a small number of switches or diodes, an energy non-consumption type cell balancing system including the cell balancing integrated circuit, and an energy non-consumption type cell balancing method. The energy non-consumption type cell balancing system includes a battery pack, a cell balancing circuit, and a plurality of inductors and capacitors.
US09583952B2
A shunt circuit includes: a shunt resistor; a transistor connected in parallel to a storage element via the shunt resistor; a first OP amplifier configured to compare a battery voltage supplied to the storage element with a detection voltage; and a second OP amplifier configured to shunt a shunt current from a charging current supplied from a charging unit when the battery voltage reaches the detection voltage. The detection voltage is increased step by step, and the shunt current is increased whenever the battery voltage reaches the detection voltage.
US09583947B2
A method of distributing electric current to electrical outlets, and a program to implement same, including the steps of supplying electric current to the electrical outlets not yet connected to an electronic device upon receipt of a distribution request from the electrical outlets; determining the instantaneous current intensity supplied to the electrical outlets; comparing the determined current intensity to a threshold referred to as the maximum threshold; and when the predetermined current intensity is greater than the maximum threshold, selecting an electrical outlet and terminating the supply of electric current to the selected electrical outlet. The steps of selection and termination being carried out while continuing the step of supplying electric current to the electrical outlets not yet connected to an electronic device upon receipt of a distribution request from the electrical outlets.
US09583946B2
A method and apparatus for regulating an input voltage to a power conversion module. In one embodiment, the method comprises computing a voltage regulation threshold based on an output voltage for the power conversion module; comparing an input voltage of the power conversion module to the voltage regulation threshold; and generating, when the input voltage satisfies the voltage regulation threshold, an average input voltage less than the voltage regulation threshold, wherein the average input voltage is generated from the input voltage.
US09583943B2
A power supply system comprises a path switching means that switches a power supply path between power generation equipment and a load so that at least a part of output power of each power generation equipment is supplied to another power generation equipment during a power failure or power instability in the grid.
US09583934B2
According to one embodiment, an excitation inrush current suppression device for suppressing excitation inrush currents flowing through a breaker of the three-phase collective operation type for opening and closing connection is configured to measure a three-phase AC voltage of the power supply bus bar to calculate prospective magnetic fluxes of the transformer, and to measure a three-phase AC voltage on the transformer side to calculate residual magnetic fluxes of the transformer after shutoff, so as to set the breaker closed when polarities of the prospective magnetic fluxes respectively agree with polarities of the residual magnetic fluxes in all of the phases respectively.
US09583926B2
A hanger bar is provided for suspending and securing an electrical box between ceiling joists. The hanger bar is comprised of a main tube section, a box support bracket, a box which attaches to the box support bracket and two end plates which are attached to the main tube section without the use of fasteners or welding.
US09583921B2
A method for connecting communication cables includes at least an input cable, an output cable, and a cable adapter. The input cable may include a plurality of input wires, each of the plurality of input wires communicatively connected to an input port. The output cable may include a plurality of output wires, each of the plurality of output wires communicatively connected to an output port. The cable adapter may be for communicatively interconnecting the input cable and the output cable. The cable adapter may include a container, a lid and a plurality of attachment mechanisms. The lid may be movably attached to the container. The plurality of attachment mechanisms may be located in the container, each of the plurality of attachment mechanisms capable of communicatively and reversibly connecting one of the plurality of input wires with one of the plurality of output wires.
US09583914B2
A semiconductor laser element is realized with high beam quality (index M2<1). A diffraction grating 6ba of a diffraction grating layer 6 extends along a principal surface 2a and is provided on a p-side surface 6a of the diffraction grating layer 6; the refractive index of the diffraction grating layer 6 periodically varies in directions extending along the principal surface 2a, in the diffraction grating 6ba; the diffraction grating 6ba has a plurality of holes 6b; the plurality of holes 6b are provided in the p-side surface 6a and arranged in translational symmetry along a square lattice R3; the plurality of holes 6b each have the same size and shape; each hole 6b corresponds to a lattice point of the diffraction grating 6ba and is of a triangular prism shape; a shape of a bottom face 6c of the hole 6b is an approximate right triangle.
US09583911B2
The present embodiment relates to an optical amplifier which can perform an amplification operation equivalent to a normal operation even with an increase of dark current in a PD forming a part of a light detection circuit for monitoring signal light as an amplification object. In the optical amplifier, a detection controller performs an anomaly determination on a light detection circuit due to an increase of dark current in the PD based on a difference between temporal change amounts of a signal component of a voltage of output signal from a light receiving unit including the PD, and a voltage component in a high frequency region included in the signal component. An amplification controller can perform suitable switching of control on a drive current to a pumping light source, based on the result of the determination.
US09583910B2
This diffraction grating is a reflection-type diffraction grating that has a grating, the cross section of which is an asymmetrical triangular shape, and wherein given that θ denotes an angle between a short side and a base of the triangular shape, and φ denotes an angle between the short side and a long side of the triangular shape, and α denotes an incident angle of light to a normal of the base, the angles θ and φ satisfy a condition represented by the following formulas: φ+θ≦90+α, 0.1127291(φ−φd)2−19.67453(φ−φd)+938.74+θd≦θ≦0.36631(φ−φd)+48.84+θd where φd=0.845σ and θd=1.065σ, in σ=α−79.25.
US09583908B2
The disclosed invention relates to a pulsed iodine laser apparatus. The laser apparatus has a flashlamp-pumped iodine laser oscillator which produces a laser pulse with a full pulse width of longer than 1 microsecond, and a COIL amplifier. The laser apparatus may has a controller which controls the timing of injecting chlorine gas contained in a high-pressure chlorine tank into the singlet oxygen generator by outputting an open/close signal of the valve V2, and the timing of injecting iodine molecules contained in a iodine molecule tank into an amplifier chamber of the COIL amplifier.
US09583899B2
An apparatus is described. In an embodiment, the apparatus comprises a housing, wherein the housing comprises a circular cavity; and at least two longitudinal grooves placed in separate corner portions of the housing and around the circular cavity. Further, the apparatus comprises an electric contact associated with each longitudinal groove.
US09583897B2
An electrical connector system includes a socket component and a plug component. The socket component includes a contact region, a first socket contact centrally located within the circular contact region, and a second socket contact radially offset from the first socket contact by a first distance. The plug component includes a plug having a plug face, a first plug contact centrally located substantially within the circular plug face, and an annular, elastically deformable conductor having a radius approximately equal to the first distance which functions as a second plug contact. The socket contact region is configured to mate with the plug face to provide electrical continuity, in a connected state, between the first socket contact and the first plug contact, and to provide electrical continuity between the second socket contact and the second plug contact.
US09583896B2
A connector system employs an electromechanical connector to connect to a complementary electromechanical connector on an electronic device in a medical system. A shroud surrounds the electromechanical connector and is conductive and shaped to provide a thermal contact to the electronic device. A shielded cable can be electrically coupled to the electromechanical connector and extending through an opening in the shroud, and an electromagnetic shield attaches to the shroud and surrounds the portion of the shielded cable extending from the shroud. A mechanical lock may be included with a spring to press the shroud against the electronic device when the mechanical lock engages the electronic device.
US09583889B2
A cable connector assembly (100) comprising a cable (300) including a plurality of wires (31) and an electrical connector (200) electrically connected with the cable, the electrical connector including a mating member (1) and a metal shell (4), the mating member including a mating shell (14) made of metal material, the mating shell including a mating portion (141) and a mounting portion (142) having a greater dimension than the mating portion, wherein the metal shell includes a main body (43) and a pair of holding portions (44) extending from a front end of the main body, the holding portions profiling an external surface shape of the mounting portion and fixed to the mounting portion.
US09583887B2
A cable connector assembly has a connector and a cable with a number of coaxial wires and a number of unshielded wires. The connector includes an insulative housing with a front tongue and a rear end, a number of contacts with mating portions exposed on the front tongue and connecting portions exposed on the rear end, and a spacer assembled to the rear end. The spacer forms a plurality of positioning holes extending therethrough along a front-to-back direction, and a passageway extending therethrough along a vertical direction perpendicular to the front-to-back direction. The coaxial wires are inserted through the corresponding positioning holes and across the passageway to reach the corresponding contacts along the front-to-back direction so as to cut the coaxial wires in the passageway along the vertical direction.
US09583882B1
An electrical connector includes an insulator, a plurality of conducting terminals, and a ground member. The insulator includes an insulating body and a tongue portion extending from one side of the insulating body. The conducting terminals include a plurality of ground terminals and a plurality of signal terminals alternatively arranged. The ground terminals and the signal terminals include a contacting portion, a tail portion, and a main portion. The ground member includes a conducting body and a plurality of extension portions. At least one side of each of the extension portions includes a restriction portion. The main portion of the ground terminals is stacked with each of the extension portions, and contact with restriction portion. The ground member and the main portions are fixed within the insulating body. The contacting portions are arranged on the surface of the tongue portion. The tail portion extends out of the insulating body.
US09583878B2
An electrical plug fastener comprising a system of binding or securing electrical plugs to avoid unintentional or accidental disconnection. The system comprises a retention mechanism or means that connects to a first cord and a second cord. The retention mechanism is hinged and comprises a clamp. The clamp further comprises a clip that can also engage the first or second cord.
US09583861B2
An electronic device includes a device body having a installation section provided on the outer surface and an internal circuit provided therein, and a connector section which can be attached to the installation section and can be removed from the installation section. The connector section has at least one functional section for connection to an external device and a first terminal electrically connected to the functional section. The device body has a second terminal electrically connected to the internal circuit and exposed on the inner surface of the installation section. The second terminal is arranged at a position where the second terminal is connected to the first terminal when the connector section is attached to the installation section.
US09583843B2
A connector includes a cable tray configured to receive and retain a cable in a stable position and couple with a top cap configured to create an electrical connection with the cable as the top cap is manipulated in a predetermined manner while coupled with the cable tray. An upper surface of the cable tray is configured to receive the cable. The cable tray also includes a finger extending beyond the first end for some distance longitudinally. The finger includes a protrusion that protrudes to some extent in a transverse direction so that a cable-accommodating gap is defined between the protrusion and the first end. The protrusion is configured to bear against the cable and retain the cable in the stable position when the cable is inserted between the protrusion and the first end (before, during and/or after an electrical connection is established).
US09583835B2
A multiband antenna includes a radiating portion, a grounding portion, a metal member, and a resonating portion. The radiating portion receives feed signals. The grounding portion is grounded. The metal member connects to the radiating portion and the grounding portion, and defines a slit that is adjacent to the radiating portion and the grounding portion. The resonating portion is positioned in an area surrounded by the radiating portion, the grounding portion, and the metal member. The resonating portion resonates with the radiating portion and the metal member to enable the multiband antenna to receive and send wireless signals at different frequencies.
US09583834B2
An antenna module includes a first coil conductor, a second coil conductor and a magnetic layer. The first coil conductor and the second coil conductor are arranged with a magnetic layer interposed therebetween so that a coil aperture of the first coil conductor and a coil aperture of the second coil conductor are opposed to each other in alignment. An inner end portion of the first coil conductor and an inner end portion of the second coil conductor are electrically connected. The first coil conductor and the second coil conductor are connected to each other so that directions of magnetic fluxes generated in coil-wound axis directions of the first coil conductor and the second conductor are mutually opposite to each other. A magnetic flux φ entering a metal body in a perpendicular direction thereto flows in a lateral direction of the magnetic layer.
US09583832B2
The phase-locked loop (PLL) presented herein controls the phase of the output of the PLL. To that end, the PLL includes an oscillator that generates an output signal at an output of the PLL responsive to a comparison between a reference signal input to the PLL and a feedback signal derived from the output signal. To control the phase of the output signal, a modulation signal is applied to one input of the oscillator, separate from the reference signal input, where the modulation signal comprises one or more pulses having a total area defined based on the desired phase shift. To maintain the desired phase shift at the output of the PLL, the PLL also sets a time relationship between the reference signal and the feedback signal based on the desired phase shift.
US09583831B2
An electrically steerable antenna arrangement comprising at least a first antenna function and a second antenna function, each antenna function comprising at least one antenna element, the antenna functions having at least one main radiation lobe that is electrically steerable, where each antenna function comprises at least one signal altering means arranged for altering the time characteristics and/or phase characteristics and/or frequency characteristics of a signal fed through the signal altering means, the electrically steerable antenna arrangement comprising a control unit arranged for feeding a signal comprising control information to the antenna functions via a control connection, the signal altering means being arranged to take certain settings in dependence of the control information, such that for certain settings of the signal altering means, a certain angular direction of said main radiation lobe in relation to an antenna reference plane is acquired. The electrically steerable antenna arrangement further comprises a first monitoring unit connected to the control connection, and a second monitoring unit connected to the antenna functions, the first monitoring unit being arranged to analyze the control information fed to the signal altering means and trigger a first alert via a first alert connection if there is a deviation which exceeds a first threshold, where furthermore the antenna functions are arranged to send signal information to the second monitoring unit regarding the resulting signal fed to said antenna elements, the second monitoring unit being arranged to analyze said signal information and to trigger a second alert via a second alert connection if there is a deviation which exceeds a second threshold.
US09583822B2
A radome for an antenna is provided as a composite of an isotropic outer layer and a structural layer of foamed polymer material. The composite is dimensioned to enclose an open end of the antenna. The radome may be retained upon the antenna by a retaining element and fasteners. The outer layer may be a polymer material with a water resistant characteristic.
US09583820B2
A vehicle-mounted antenna device includes a base, a board, a circuit section, and a housing. The base is mountable on a roof of a vehicle. The board has an antenna element section and is stood on the base. The circuit section is implemented on the board and serves as at least part of a wireless communication circuit electrically connected to the antenna element section. The housing is made of a resin material and forms a projection of an outer shape of the vehicle. The board and the circuit section are located in space formed by the base and the housing. A heat transfer path having a thermal conductivity higher than that of air is formed between the circuit section and the housing without passing the base.
US09583818B2
A metamaterial is configured by arranging at least one element on a planar conductor plate, where the at least one element has a first conductor portion arranged a predetermined distance away from the conductor plate in a two-dimensional plane that includes the conductor plate, and a second conductor portion arranged so as to connect the conductor plate and the first conductor portion.
US09583816B2
A wireless transceiver includes at least one antenna, a substrate, and a mechanical part on which the at least one antenna is disposed, wherein a relative position between the at least one antenna and the substrate is changed when an external force is applied to the mechanical part.
US09583809B2
A high-frequency signal line includes a body with a first layer level and a second layer level; a signal line including a first line portion provided at the first layer level, a second line portion provided at the second layer level, and a first interlayer connection connecting the first line portion and the second line portion; a first ground conductor including a first ground portion provided at the first layer level; a second ground conductor including a second ground portion provided at the second layer level; and a second interlayer connection connecting the first ground portion and the second ground portion. A distance between the first interlayer connection and the second interlayer connection is not less than a maximum distance between the first line portion and the first ground portion and is not less than a maximum distance between the second line portion and the second ground portion.
US09583805B2
An RF filter assembly comprising a substrate, an RF waveguide filter mounted on the substrate and a pair of alignment/mounting/RF signal transmission pins extending from respective apertures in the substrate into respective through-holes in the RF filter. In one embodiment, the RF waveguide filter is comprised of first and second blocks of dielectric material coupled together in an abutting side-by-side relationship and the pair of through-holes are defined in the first and second blocks respectively. In one embodiment, respective RF signal transmission pads defined on the respective first and second blocks of dielectric material are abutted against respective RF signal transmission pads defined on the substrate and interconnected by an RF signal transmission line in the interior of the substrate for transmitting the RF signal between the first and second blocks of dielectric material.
US09583802B2
Disclosed herein are various systems and methods for controlling humidity in batteries to reduce formation of condensate in a battery compartment. In one embodiment, a system consistent with the present disclosure may include a cooling system configured to produce a flow of coolant. A battery compartment may house a battery and may separate the battery from an environment. The flow of coolant may pass into the battery compartment and may be used to cool the battery. The battery compartment may include a vent configured to permit a flow of environmental air to enter the battery compartment. A diffusion barrier may be in fluid communication with the vent and configured to deliver the flow of environment air to the battery compartment. The diffusion barrier may decrease diffusion of water vapor from the environment into the battery compartment.
US09583790B2
An electrolyte for a lithium battery, the electrolyte including a compound represented by Formula 1; a nonaqueous organic solvent; and a lithium salt. wherein, in Formula 1, X, Ya, Z, R1, and R2 are as defined.
US09583785B2
The present invention relates to a cable-type secondary battery having a horizontal cross section of a predetermined shape and extending longitudinally, comprising: an inner electrode having an inner current collector and an inner electrode active material layer surrounding the outer surface of the inner current collector; a separation layer surrounding the outer surface of the inner electrode to prevent a short circuit between electrodes; and an outer electrode surrounding the outer surface of the separation layer, and having an outer electrode active material layer, an open-structured outer current collector and a conductive paste layer.The outer electrode having a conductive paste layer and an open-structured outer current collector according to the present invention has good flexibility to improve the flexibility of a cable-type secondary battery having the same. Also, the conductive paste layer is made of a light material, and thus can contribute to the lightening of the cable-type secondary battery.
US09583778B2
An iterative process of depositing on a solid electrolyte a coating of unconnected particles composed of an ionically conductive material. A liquid solution is also applied. The liquid solution includes an inorganic component. The deposited liquid is heated to a temperature sufficient to evaporate or otherwise remove some or all of the volatile components of the liquid solution. Typically the temperature is below 1000° and often at about 850° C. The effect of heating the solution is to cause ion conducting material in the solution to adhere to the surface of the existing ion conducting particles and form connections between these particles. This is understood to create an ion conducting skeletal support structure. Within the intrestices of this skeletal support structure, the step of heating is also understood to result in the deposition of the inorganic component that will begin to form a electron conducting structure. The process of applying the liquid solution and heating may be repeated until a sufficiently thick layer of material is laid over the solid electrolyte to provide the composite electrode structure desired.
US09583775B2
A method of operating a fuel cell system which is controlled by an electronic device includes: transmitting a bit stream including a bit string which indicates identification information of the fuel cell system and a bit string which indicates status information of the fuel cell system to the electronic device through a serial communication line; receiving a bit stream including a bit string which indicates control information of the fuel cell system from the electronic device through the serial communication line; obtaining the control information of the fuel cell system from the received bit stream; and controlling power production of a fuel cell by controlling operations of peripheral devices of the fuel cell system based on the obtained control information of the fuel cell system.
US09583773B2
Provided is a solid oxide fuel cell unit comprising an insulating support, and a power generation element comprising, at least, a fuel electrode, an electrolyte and an air electrode, which are sequentially laminated one another, the power generation element being provided on the insulating support, wherein an exposed insulating support portion, an exposed fuel electrode portion, and an exposed electrolyte portion are provided in an fuel electrode cell end portion.
US09583770B2
High capacity energy storage devices and energy storage device components, and more specifically, to a system and method for fabricating such high capacity energy storage devices and storage device components using processes that form three-dimensional porous structures are provided. In one embodiment, an anode structure for use in a high capacity energy storage device, comprising a conductive collector substrate, a three-dimensional copper-tin-iron porous conductive matrix formed on one or more surfaces of the conductive collector substrate, comprising a plurality of meso-porous structures formed over the conductive current collector, and an anodically active material deposited over the three-dimensional copper-tin-iron porous conductive matrix is provided. In certain embodiments, the three-dimensional copper-tin-iron porous conductive matrix further comprises a plurality of columnar projections formed on the conductive current collector with the plurality of meso-porous structure formed on the plurality of columnar projections.
US09583767B2
Methods for making battery electrode system are disclosed herein. In an example of the method, a mixture of a polymer binder, an active material and a conductive filler is deposited on a current collector. The deposited mixture is exposed to an external field having a field direction that is normal to a surface of the current collector. The exposure aligns, outward from and normal to the surface of the current collector, the active material and the conductive filler to form a plurality of discrete structures that extend outward from and normal to the surface of the current collector and are respectively aligned with a field line of the external field. Each of the plurality of discrete structures includes some of the active material and some of the conductive filler.
US09583764B2
When producing a nickel composite hydroxide that is a precursor to the cathode active material for a non-aqueous electrolyte secondary battery by supplying an aqueous solution that includes at least a nickel salt, a neutralizing agent and a complexing agent into a reaction vessel while stirring and performing a crystallization reaction, a nickel composite hydroxide slurry is obtained while controlling the ratio of the average particle size per volume of secondary particles of nickel composite hydroxide that is generated inside the reaction vessel with respect to the average particle size per volume of secondary particles of nickel composite hydroxide that is finally obtained so as to be 0.2 to 0.6, after which, while keeping the amount of slurry constant and continuously removing only the liquid component, the crystallization reaction is continued until the average particle size per volume of secondary particles of the nickel composite hydroxide becomes 8.0 μm to 50.0 μm.
US09583758B2
Battery electrodes are provided that can include a conductive core supported by a polymeric frame. Methods for manufacturing battery electrodes are provided that can include: providing a sheet of conductive material; and framing the sheet of conductive material with a polymeric material. Batteries are provided that can include a plurality of electrodes, with individual ones of the electrodes comprising a conductive core supported by a polymeric frame.
US09583756B2
Provided is an anode for a lithium secondary battery composed of a multi-layered structure including an electrode current collector, a first anode active material layer including a first anode active material formed on the electrode current collector, and a second anode active material layer including a second anode active material having relatively lower press density and relatively larger average particle diameter than the first anode active material. Since an anode according to an embodiment of the present invention may include a multi-layered active material layer including two kinds of anode active materials having different press densities and average particle diameters on an electrode current collector, porosity of the surface of the electrode may be improved even after a press process to improve ion mobility into the electrode. Thus, charge characteristics and cycle life of a lithium secondary battery may be improved.
US09583748B2
Disclosed is a battery pack which improves coupling strength and space utilization of a plurality of battery modules.
US09583746B2
An electric power tool comprises a main body supporting a tool and an electric motor housed in the main body for driving the tool. A plurality of first battery interfaces is configured to removably receive or attach a plurality of first battery packs and to electrically connect the plurality of attached first battery packs in series with the electric motor. A plurality of indicators is configured to communicate information concerning the respective conditions of the plurality of attached first battery packs. The plurality of indicators is arranged such that all of the indicators are simultaneously viewable by a user of the electric power tool.
US09583728B2
An organic light emitting device includes a base substrate defining an active area and a pad area that surrounds the active area, an organic light emitting layer formed on the active area, a first protective layer formed to cover the active area, where the organic light emitting layer is formed, and the pad area, a second protective layer formed to cover the first protective layer, and a dam formed between the first protective layer and the second protective layer, wherein the dam is located at a boundary between the active area and the pad area and includes a groove that is positioned separate from an outer portion of the active area.
US09583711B2
The present invention relates to newly functionalized polythiophenes and the syntheses thereof. The present invention also demonstrates that the new polythiophenes and their derivatives are suitable for fabricating organic light emitting diodes (OLEDs), light emitting diodes (PLEDs), organic photovoltaic devices (OPVs) and conducting polymers for printed electronic devices.
US09583710B2
Organic semiconductor polymer, composition for organic semiconductor material, and photovoltaic cell
An organic semiconductor polymer having a structural unit represented by the following Formula (I), a composition for organic semiconductor material, a photovoltaic cell and a polymer, wherein X represents Si, S or O; R1 represents a hydrogen atom, an alkyl group, a cycloalkyl group, an aryl group, an aromatic heterocyclic group or an oxygen atom; p represents 0, 1 or 2; herein, the bond between X and R1 is such that when X is Si, the bond is a single bond, and when X is S, the bond is a double bond. Furthermore, when X is O, p represents 0.
US09583707B2
Embodiments of the disclosed subject matter provide a nozzle assembly and method of making the same, the nozzle assembly including a first aperture formed on a first aperture plate to eject a carrier gas flow having organic vapor onto a substrate in a deposition chamber, second apertures formed on a second aperture plate disposed adjacent to the first aperture to form a vacuum aperture, where the first aperture plate and the second aperture plate are separated by a first separator plate, third apertures formed on a third aperture plate to eject purge gas that are disposed adjacent to the second aperture plate, where the second aperture plate and the third aperture plate are separated by second separator plate, and a third separator plate is disposed adjacent to the one or more third aperture plates to form a gas channel in the one or more third aperture plates.
US09583692B2
A piezoelectric vibration device capable of allowing a low profile and generating strong vibration, and a portable terminal using the same are provided. Disclosed are a piezoelectric vibration device at least including a support body (11); a vibration member (12) mounted to the support body (11) so as to vibrate; a vibration element (14) capable of being subjected to bending vibration; and a deformable first connecting member (13) interposed between a first surface that is a bending surface of the vibration element (14) and one main surface of the vibration member (12), and a portable terminal using the same. A piezoelectric vibration device capable of allowing a low profile and generating strong vibration, and a portable terminal can be obtained.
US09583677B2
A method of manufacturing a light-emitting diode comprises the steps of providing a substrate comprising an upper surface and a bottom surface opposite to the upper surface; providing a semiconductor stack layer on the upper surface, wherein the semiconductor stack layer comprises a first type semiconductor layer having a first surface, a light-emitting layer on the first type semiconductor layer for emitting light, and a second type semiconductor layer on the light-emitting layer; treating the first surface to form a second surface, wherein the second surface is flatter than the first surface; and providing a laser beam through the second surface to cut the substrate.
US09583670B2
A luminescence conversion element for wavelength conversion of primary electromagnetic radiation into secondary electromagnetic radiation includes first luminescent material particles that, when excited by the primary electromagnetic radiation, emit a first electromagnetic radiation, a peak wavelength of which is at least 515 nm to at most 550 nm of a green region of the electromagnetic spectrum; second luminescent material particles that, when excited by the primary electromagnetic radiation, emit a second electromagnetic radiation, a peak wavelength of which is at least 595 nm to at most 612 nm of a yellow-red region of the electromagnetic spectrum; and third luminescent material particles that, when excited by the primary electromagnetic radiation, emit a third electromagnetic radiation, a peak wavelength of which is at least 625 nm to at most 660 nm of a red region of the electromagnetic spectrum.
US09583669B2
The methods involve selectively depositing a resist containing a solid hydrogenated rosin resin and a liquid hydrogenated rosin resin ester as a mixture on a semiconductor followed by etching uncoated portions of the semiconductor and simultaneously inhibiting undercutting of the resist. The etched portions may then be metallized to form current tracks.
US09583667B2
Systems and methods for forming solar cells with CuInSe2 and Cu(In,Ga)Se2 films are provided. In one embodiment, a method comprises: during a first stage (220), performing a mass transport through vapor transport of an indium chloride (InClx) vapor (143, 223) and Se vapor (121, 225) to deposit a semiconductor film (212, 232, 252) upon a substrate (114, 210, 230, 250); heating the substrate (114, 210, 230, 250) and the semiconductor film to a desired temperature (112); during a second stage (240) following the first stage (220), performing a mass transport through vapor transport of a copper chloride (CuClx) vapor (143, 243) and Se vapor (121, 245) to the semiconductor film (212, 232, 252); and during a third stage (260) following the second stage (240), performing a mass transport through vapor transport of an indium chloride (InClx) vapor (143, 263) and Se vapor (121, 265) to the semiconductor film (212, 232, 252).
US09583659B2
Disclosed is a solar cell module. The solar cell module includes a substrate including at least one hole, and a first surface and a second surface opposite to each other; a solar cell panel located on the first surface and including a plurality of solar cells; a bus bar connected to one of the solar cells; and a cable for outputting a current of the solar cell panel to an outside, wherein the bus bar makes contact with the cable through the hole.
US09583642B2
A diode has a multiple p-n junction body, anode and cathode electrodes, a short-circuit electrode, a guard ring, and an insulation film. The multiple p-n junction body has first to fourth semiconductor layers stacked to provide a lamination structure between the anode electrode and the cathode electrode. Each of the first and third semiconductor layers is a first conductive semiconductor. Each of the second and fourth semiconductor layers is a second conductive semiconductor. The first and second semiconductor layers form a p-n junction. The second and third semiconductor layers form a p-n junction. The third and fourth semiconductor layers form a p-n junction. The short circuit electrode provides a short circuit between the second semiconductor layer and the third semiconductor layer. A high concentration region is formed in a contact region in the second semiconductor layer. A surface of the contact region is in contact with the short-circuit electrode.
US09583633B2
In an oxide for a semiconductor layer of a thin film transistor according to the present invention, wherein metal elements constituting the oxide are In, Zn, and Sn, an oxygen partial pressure is 15% by volume or more when depositing the oxide in the semiconductor layer of the thin film transistor, and a defect density of the oxide satisfies 7.5×1015cm−3 or less, and a mobility satisfies 15 cm2/Vs or more.
US09583632B2
A crystalline oxide semiconductor film and a semiconductor device including the oxide semiconductor film are provided. One embodiment of the present invention is an oxide semiconductor film including a plurality of flat-plate particles each having a structure in which layers including a gallium atom, a zinc atom, and an oxygen atom are provided over and under a layer including an indium atom and an oxygen atom. In the semiconductor film, the plurality of flat-plate particles face in random directions, and a crystal boundary is not observed using a transmission electron microscope.
US09583629B2
According to one embodiment, a first transistor includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first gate insulating film, and a first gate electrode. The first semiconductor region is provided in a first semiconductor layer extending in a second direction substantially perpendicular to the surface of the semiconductor substrate from the first line. The second semiconductor region is provided above the first semiconductor region in the first semiconductor layer. The third semiconductor region is provided above the second semiconductor region in the first semiconductor layer. The first gate insulating film covers a first side face of the first semiconductor layer. The first gate electrode covers the first side face of the first semiconductor layer through the first gate insulating film. The first transistor has an asymmetrical structure with respect to a center face of the second semiconductor region in the second direction.
US09583628B2
A device includes a semiconductor substrate. A gate stack on the semiconductor substrate includes a gate dielectric layer and a gate conductor layer. Low-k spacers are adjacent to the gate dielectric layer. Raised source/drain (RSD) regions are adjacent to the low-k spacers. The low-k spacers are embedded in an ILD on the RSD regions.
US09583615B2
A first patterned stack and a second patterned stack are formed over a substrate, each of which includes a bottom semiconductor layer, a bottom dielectric spacer layer, a conductive material layer, and a top dielectric spacer layer. Gate dielectrics and vertical semiconductor portions are sequentially formed on each patterned stack. Vertical semiconductor portions are removed from around the second patterned stack, while masked around the first patterned stack. Electrical dopants are introduced to top regions and bottom regions of the remaining vertical semiconductor portions to form a vertical switching device that includes the first patterned stack, while the second patterned stack functions as a horizontal interconnect structure. The vertical switching device can be a transistor or a gated diode.
US09583611B2
A trench MOSFET device includes a semiconductor layer of a first doping type. MOS transistor cells are in a body region of a second doping type in the semiconductor layer. The transistor cells include a first cell type including a first trench providing a first gate electrode or the first gate electrode is on the semiconductor surface between the first trench and a second trench, and a first source region is formed in the body region. The first gate electrode is electrically isolated from the first source region. A second cell type has a third trench providing a second gate electrode or the second gate electrode is on the semiconductor surface between the third trench and a fourth trench, and a second source region is in the body region. An electrically conductive member directly connects the second gate electrode, first source region and second source region together.
US09583606B2
An improvement is achieved in the reliability of a semiconductor device having an IGBT. In an active cell region, in a portion of a semiconductor substrate which is interposed between first and second trenches in which first and second trench gate electrodes are embedded, an n+-type emitter region, a p-type body region located thereunder, and a first n-type hole barrier region located thereunder are formed. In a hole collector cell region, in a portion of the semiconductor substrate which is interposed between third and fourth trenches in which third and fourth trench gate electrodes are embedded, the p-type body region and a second n-type hole barrier region located thereunder are formed, but an n-type semiconductor region equivalent to the n+-type emitter region is not formed. Under the first and second n-type hole barrier regions, an n−-type drift region having an impurity concentration lower than those thereof is present. The impurity concentration of the second n-type hole barrier region is higher than the impurity concentration of the first n-type hole barrier region.
US09583599B2
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming a fin using double trench epitaxy. The fin may be composed of a III-V semiconductor material and may be grown on a silicon, silicon germanium, or germanium substrate. A double trench aspect ratio trapping (ART) epitaxy method may trap crystalline defects within a lower trench (i.e. a defective region) and may permit formation of a fin free of patterning defects in an upper trench (i.e. a fin mold). Crystalline defects within the defective region may be trapped via conventional aspect ratio trapping or three-sided aspect ratio trapping. Fin patterning defects may be avoided by utilizing a fin mold to grow an epitaxial fin and selectively removing dielectric material adjacent to a fin region.
US09583597B2
Asymmetric FinFET devices and methods for fabricating such devices are provided. In one embodiment, a method includes providing a semiconductor substrate comprising a plurality of fin structures formed thereon and depositing a conformal liner over the fin structures. A first portion of the conformal liner is removed, leaving a first space between the fins structures and forming a first metal gate in the first space between the fin structures. A second portion of the conformal liner is removed, leaving a second space between the fin structures and forming a second metal gate in the second space between the fin structures.
US09583593B2
A FinFET and a method of manufacturing the same are disclosed. The method includes forming a semiconductor fin. The method further includes forming a first region, the first region being one of a source region and a drain region. The method further includes forming a sacrificial spacer. The method further includes forming a second region with the sacrificial spacer as a mask, the second region being the other one of the source region and the drain region. The method further includes removing the sacrificial spacer. The method further includes replacing the sacrificial spacer with a gate stack comprising a gate conductor and a gate dielectric that separates the gate conductor from the semiconductor fin.
US09583584B2
Integrated circuits and methods for producing the same are provided. In an exemplary embodiment, a method for producing an integrated circuit includes forming a work function layer overlying a substrate and a plurality of dielectric columns. The dielectric columns and the substrate define a short region having a short region width and a long region having a long region width greater than the short region width. The work function layer is recessed in the long region to a long region work function height that is between a dielectric column top surface and a substrate top surface. The work function layer is also recessed in the short region to a short region work function height that is between the dielectric column top surface and the substrate top surface. Recessing the work function layer in the long and short regions is conducted in the absence of lithography techniques.
US09583579B2
A semiconductor device is formed by forming a deep trench in a substrate and a dielectric liner on sidewalls of the deep trench. A first undoped polysilicon layer is formed on the semiconductor device, extending into the deep trench on the dielectric liner, but not filling the deep trench. Dopants are implanted into the first polysilicon layer. A second layer of polysilicon is formed on the first layer of polysilicon. A thermal drive anneal activates and diffuses the dopants. In one version, the dielectric liner is removed at the bottom of the deep trench before the first polysilicon layer is formed, so that the polysilicon in the deep trench provides a contact to the substrate. In another version, the polysilicon in the deep trench is isolated from the substrate by the dielectric liner.
US09583578B2
A semiconductor portion of a semiconductor device includes a semiconductor layer with a drift zone of a first conductivity type and at least one impurity zone of a second, opposite conductivity type. The impurity zone adjoins a first surface of the semiconductor portion in an element area. A connection layer directly adjoins the semiconductor layer opposite to the first surface. At a distance to the first surface an overcompensation zone is formed in an edge area that surrounds the element area. The overcompensation zone and the connection layer have opposite conductivity types. In a direction vertical to the first surface, a portion of the drift zone is arranged between the first surface and the overcompensation zone. In case of locally high current densities, the overcompensation zone injects charge carriers into the semiconductor layer that locally counter a further increase of electric field strength and reduce the risk of avalanche breakdown.
US09583575B2
Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.
US09583557B2
Integrated circuits including a MIMCAP device and methods of forming the integrated circuits are provided. An exemplary method of forming an integrated circuit including a MIMCAP device includes pre-determining a thickness of at least one of a bottom high-K layer or a top high-K layer of the MIMCAP device, followed by fabricating the MIMCAP device. The pre-determined thickness is established based upon a pre-determined TDDB lifetime for the MIMCAP device and a minimum target capacitance density at an applied voltage bias to be employed for the MIMCAP device. The MIMCAP device includes a bottom electrode and a dielectric layer disposed over the bottom electrode. The dielectric layer includes a stack of individual layers including the bottom high-K layer, the top high-K layer, and a lower-K layer sandwiched therebetween. At least one of the bottom high-K layer or the top high-K layer has the pre-determined thickness.
US09583556B2
Provided is a method of forming a decoupling capacitor device and the device thereof. The decoupling capacitor device includes a first dielectric layer portion that is deposited in a deposition process that also deposits a second dielectric layer portion for a non-volatile memory cell. Both portions are patterned using a single mask. A system-on-chip (SOC) device is also provided, the SOC include an RRAM cell and a decoupling capacitor situated in a single inter-metal dielectric layer. Also a method for forming a process-compatible decoupling capacitor is provided. The method includes patterning a top electrode layer, an insulating layer, and a bottom electrode layer to form a non-volatile memory element and a decoupling capacitor.
US09583553B2
An organic light emitting display device includes a substrate a plurality of pixels disposed along a first direction and a second direction, the first direction and the second direction being substantially parallel to a top surface of the substrate and substantially perpendicular to each other, first wirings which is disposed on the substrate, extends in the first direction, and includes a first low voltage power line, and second wirings which is disposed on the substrate, extends in the second direction, and includes a second low voltage power line electrically connected to the first low voltage power line.
US09583541B2
The present invention provides an organic light emitting device including: a substrate; and two or more stacked light emitting elements, which comprise a first electrode, at least one intermediate electrode, a second electrode, and an organic material layer disposed between the electrodes, the stacked organic light emitting elements including a first group of electrodes electrically connected to each other such that among the electrodes, at least two electrodes, which are not adjacent to each other, become a common electric potential, and a second group of electrodes which include one electrode among electrodes which are not electrically connected to the first group of electrodes, or at least two electrodes which are not electrically connected to the first group of electrodes and are electrically connected to each other so as to be a common electric potential without being adjacent to each other, in which the stacked organic light emitting elements are disposed at an interval apart from each other on the substrate and driven by an alternating current power source such that a form, in which a first group of electrodes of one stacked organic light emitting element among the stacked organic light emitting elements are directly connected to a second group of electrodes of another stacked organic light element, is continuously repeated.
US09583536B2
A memory device having an array area and a periphery area is provided. The memory device includes a substrate, an isolation layer formed in the substrate, a first doped region formed on the isolation layer in the array area, a second doped region formed on the first doped region, a metal silicide layer formed on the second doped region, and a metal silicide oxide layer formed on the metal silicide layer.
US09583535B2
According to one embodiment, a magnetoresistive memory device includes a substrate, a first oxide film provided on the substrate, bottom electrodes provided in the first oxide film, a part of each of the bottom electrodes protruding above the first oxide film, magnetoresistive elements provided on the respective bottom electrodes, sidewall nitride films provided on side surfaces of the respective bottom electrodes and the magnetoresistive elements, a second oxide film provided on the magnetoresistive elements, the sidewall nitride films and the first oxide film, and contact electrodes provided in the second oxide film and the first oxide film to reach the substrate from an upper surface of the second oxide film.
US09583522B2
Disclosed are an image sensor including a light collection member having a multi-layer step shape and an electronic device including the same. This technology can improve light condensing efficiency in a unit pixel since a corresponding pixel lens is included. Furthermore, light condensing efficiency in a unit pixel can be improved more effectively by controlling the width of a corresponding pixel lens so that the pixel lens corresponds to the wavelength of incident light whose color has been separated by a corresponding color filter. As described above, quantum efficiency in the photoelectric conversion element can also be improved since light condensing efficiency in a unit pixel is improved. As a result, performance of the image sensor can be improved.
US09583507B2
The present invention relates generally to semiconductor devices, and more particularly, to a structure and method of forming strained <100> n-channel field effect transistor (NFET) fins and adjacent strained <110> p-channel field effect transistor (PFET) fins on the same substrate. A <110> crystalline oxide layer may be either bonded or epitaxially grown on a substrate layer. A first SOI layer with a <100> crystallographic orientation and tensile strain may be bonded to the crystalline oxide layer. A second SOI layer with a <110> crystallographic orientation and compressive strain may be epitaxially grown on the crystalline oxide layer. The first SOI layer may be used to form the fins of a NFET device. The second SOI layer may be used to form the fins of a PFET device.
US09583502B2
After forming a first film over the main surface of a semiconductor substrate, the first film is patterned, thereby forming a control gate electrode for a non-volatile memory, a dummy gate electrode, and a first film pattern. Subsequently, a memory gate electrode for the non-volatile memory adjacent to the control gate electrode is formed. Then, the first film pattern is patterned thereby forming a gate electrode and a dummy gate electrode.
US09583497B2
A high-k dielectric metal trench capacitor and improved isolation and methods of manufacturing the same is provided. The method includes forming at least one deep trench in a substrate, and filling the deep trench with sacrificial fill material and a poly material. The method further includes continuing with CMOS processes, comprising forming at least one transistor and back end of line (BEOL) layer. The method further includes removing the sacrificial fill material from the deep trenches to expose sidewalls, and forming a capacitor plate on the exposed sidewalls of the deep trench. The method further includes lining the capacitor plate with a high-k dielectric material and filling remaining portions of the deep trench with a metal material, over the high-k dielectric material. The method further includes providing a passivation layer on the deep trench filled with the metal material and the high-k dielectric material.
US09583490B2
Inverters and methods of manufacture thereof are disclosed. In some embodiments, an inverter includes a substrate and a first tunnel FET (TFET) disposed over the substrate. The first TFET is a first fin field effect transistor (FinFET). A second TFET is over the first TFET. The second TFET is a second FinFET. A junction isolation region is disposed between a source of the first TFET and a source of the second TFET.
US09583480B2
An integrated circuit having a substrate, a buffer layer formed over the substrate, a barrier layer formed over the buffer layer, and an isolation region that isolates an enhancement mode device from a depletion mode device. The integrated circuit further includes a first gate contact for the enhancement mode device that is disposed in one gate contact recess and a second gate contact for the depletion mode device that is disposed in a second gate contact recess.
US09583479B1
A charge pump for an integrated circuit includes a substrate, first and second transistors and a capacitor. The first transistor includes first source and first drain regions disposed within the substrate and defining a first channel therebetween. The first source and first drain regions are implanted with one of an n-type and a p-type dopant. The second transistor includes second source and second drain regions disposed within the substrate and defining a second channel therebetween. The second source and second drain regions implanted with the same type dopant as the first source region. The capacitor includes a metal terminal and a substrate terminal with a dielectric therebetween. The substrate terminal is disposed within the substrate and implanted with the same type dopant as the first source region. The substrate terminal contacts the first drain region and second source region within the substrate to provide electrical continuity therebetween.
US09583476B2
A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.
US09583471B2
Disclosed is an integrated circuit module that includes a first die having a plurality of hot regions and at least one cool region when operating under normal conditions. The first die with a top surface includes at least one power amplifier that resides in the plurality of hot regions. The integrated circuit module also includes a second die. The second die has a bottom surface, which is adhered to the top surface of the first die, wherein any portion of the bottom surface of the second die that is adhered to the top surface of the first die resides exclusively on the at least one cool region. In at least one embodiment, the first die is an RF power amplifier die and the second die is a controller die having control circuitry configured to control the at least one power amplifier that is an RF power amplifier type.
US09583470B2
An electronic device including a solder pad structure and methods of forming an electrical interconnection are shown. Solder pads including one or more projections extending from the pads are shown where the projections occupy only a fraction of a surface area of the pads. Processes such as thermal compression bonding using solder pads as described are also shown.
US09583466B2
A method and structure for forming an array of LED devices is disclosed. The LED devices in accordance with embodiments of the invention may include a confined current injection area in which a current spreading layer protrudes away from a cladding layer in a pillar configuration so that the cladding layer is wider than the current spreading layer pillar.
US09583459B2
The invention concerns a method for producing a printed circuit for a chip card module. This method involves producing two layers of electrically conductive material insulated from each other by a layer of insulating material, connection holes extending through the layer of insulating material and blocked by one of the layers of electrically conductive material, an area free of conductive material being provided in the other layer of electrically conductive material around the connection holes. The invention also concerns a printed circuit for a chip card produced using this method and a chip card module including such a printed circuit.
US09583451B2
Pillar-type connections and methods for fabricating a pillar-type connection. A conductive layer is formed on a bond pad. A second conductive layer is formed on the first conductive layer to define a conductive pillar. The conductive pillar includes a non-planar top surface defining a recess. The recess may receive a portion of a solder body used to connect the conductive pillar with a package.
US09583447B2
Disclosed is an EMI shielding method of semiconductor packages, including a tape attaching step of attaching an edge of a tape to a lower side of a frame to dispose the tape inside an inner circumferential side of the frame, a tape cutting step of forming holes through the tape at regular intervals, a semiconductor package fastening step of disposing edges of lower sides of the semiconductor packages on an upper side of the tape so that bumps, formed on the lower sides of the semiconductor packages, are inserted into the holes in the tape to thus fasten the semiconductor packages at regular intervals to the upper side of the tape, and a coating step of performing a coating operation over the tape to form a coat on the semiconductor packages and the upper side of the tape.
US09583442B2
An interconnect structure includes an insulator stack on an upper surface of a semiconductor substrate. The insulator stack includes a first insulator layer having at least one semiconductor device embedded therein and an etch stop layer interposed between the first insulator layer and a second insulator layer. At least one electrically conductive local contact extends through each of the second insulator layer, etch stop layer and, first insulator layer to contact the at least one semiconductor device. The interconnect structure further includes at least one first layer contact element disposed on the etch stop layer and against the at least one conductive local contact.
US09583435B2
A spacer etching process produces ultra-narrow conductive lines in a plurality of semiconductor dice. Trenches are formed in a first dielectric then a sacrificial film is deposited onto the first dielectric and the trench surfaces formed therein. Planar sacrificial film is removed from the face of the first dielectric and bottom of the trenches, leaving only sacrificial films on the trench walls. A gap between the sacrificial films on the trench walls is filled in with a second dielectric. A portion of the second dielectric is removed to expose tops of the sacrificial films. The sacrificial films are removed leaving ultra-thin gaps that are filled in with a conductive material. The tops of the conductive material in the gaps are exposed to create “fence conductors.” Portions of the fence conductors and surrounding insulating materials are removed at appropriate locations to produce desired conductor patterns comprising isolated fence conductors.
US09583427B2
The present disclosure relates to a semiconductor substrate, a semiconductor package structure, and methods for making the same. A method includes providing a substrate and a carrier layer. The substrate includes a first patterned metal layer, a second patterned metal layer spaced from the first patterned metal layer, and a dielectric layer disposed between the first patterned metal layer and the second patterned metal layer. The dielectric layer covers the second patterned metal layer. The dielectric layer defines first openings exposing the second patterned metal layer, and further defines a via opening extending from the first patterned metal layer to the second patterned metal layer. A conductive material is disposed in the via and electrically connects the first patterned metal layer to the second patterned metal layer. The carrier layer defines second openings exposing the second patterned metal layer.
US09583426B2
An interposer (110) has contact pads at the top and/or bottom surfaces for connection to circuit modules (e.g. ICs 112). The interposer includes a substrate made of multiple layers (110.i). Each layer can be a substrate (110S), possibly a ceramic substrate, with circuitry. The substrates extend vertically. Multiple interposers are fabricated in a single structure (310) made of vertical layers (310.i) corresponding to the interposers' layers. The structure is diced along horizontal planes (314) to provide the interposers. An interposer's vertical conductive lines (similar to through-substrate vias) can be formed on the substrates' surfaces before dicing and before all the substrates are attached to each other. Thus, there is no need to make through-substrate holes for the vertical conductive lines. Non-vertical features can also be formed on the substrates' surfaces before the substrates are attached to each other. Other embodiments are also provided.
US09583421B2
Leadframes for semiconductor packages. Implementations may include a plurality of leads extending inwardly into an opening surrounded by the plurality of leads where the plurality of leads except for at least one are configured to mechanically couple at a surface of a semiconductor chip. The at least one of the plurality of leads that is not configured to mechanically coupled at the surface of the semiconductor chip be configured to electrically couple with the semiconductor chip.
US09583420B2
A semiconductor device and method of manufacture is provided. A reflowable material is placed in electrical connection with a through via, wherein the through via extends through an encapsulant. A protective layer is formed over the reflowable material. In an embodiment an opening is formed within the protective layer to expose the reflowable material. In another embodiment the protective layer is formed such that the reflowable material is extending away from the protective layer.
US09583414B2
A semiconductor device that does not produce nonlinearities attributed to a high resistivity silicon handle interfaced with a dielectric region of a buried oxide (BOX) layer is disclosed. The semiconductor device includes a semiconductor stack structure with a first surface and a second surface wherein the second surface is on an opposite side of the semiconductor stack structure from the first surface. At least one device terminal is included in the semiconductor stack structure and at least one electrical contact extends from the second surface and is electrically coupled to the at least one device terminal. The semiconductor stack is protected by a polymer disposed on the first surface of the semiconductor stack. The polymer has high thermal conductivity and high electrical resistivity.
US09583409B2
A resin-sealed module is provided which reduces the warpage of a substrate and the detachment between a sealing resin and the substrate which occur during re-reflow, has the excellent flatness of the top and bottom surfaces, and reduces the occurrence of the short failures. A resin layer made of a thermoplastic resin is arranged on top of a substrate, and a resin layer made of a thermosetting resin is arranged on top of this resin layer, thereby reducing the warpage of the substrate and the detachment between the sealing resin and the substrate which occur during re-reflow.
US09583402B2
A method includes loading a substrate into a sensing chamber; while the substrate is in the sensing chamber, performing a spectral analysis of the substrate; transferring the substrate between the sensing chamber and a processing chamber coupled to the sensing chamber; processing the substrate in the processing chamber to form at least a first layer and/or pattern on the substrate; and based on at least the spectral analysis, determining whether a parameter resulting from the formation of first layer and/or pattern is satisfied.
US09583400B1
A method for fabricating a gate stack of a semiconductor device comprising forming a first dielectric layer over a channel region of the device, forming a barrier layer over the first dielectric layer, forming a first gate metal layer over the barrier layer, forming a capping layer over the first gate metal layer, removing portions of the barrier layer, the first gate metal layer, and the capping layer to expose a portion of the first dielectric layer in a p-type field effect transistor (pFET) region of the gate stack, depositing a first nitride layer on exposed portions of the capping layer and the first dielectric layer, depositing a scavenging layer on the first nitride layer, depositing a second nitride layer on the scavenging layer, and depositing a gate electrode material on the second nitride layer.
US09583398B2
An integrated circuit is provided. The integrated circuit includes a substrate, a first FinFET device supported by the substrate, the first FinFET device having a first fin with a non-tiered fin profile, and a second FinFET supported by the substrate, the second FinFET having a second fin with a tiered fin profile.
US09583396B2
Electronic device fins may be formed by epitaxially growing a first layer of material on a substrate surface at a bottom of a trench formed between sidewalls of shallow trench isolation (STI) regions. The trench height may be at least 1.5 times its width, and the first layer may fill less than the trench height. Then a second layer of material may be epitaxially grown on the first layer in the trench and over top surfaces of the STI regions. The second layer may have a second width extending over the trench and over portions of top surfaces of the STI regions. The second layer may then be patterned and etched to form a pair of electronic device fins over portions of the top surfaces of the STI regions, proximate to the trench. This process may avoid crystalline defects in the fins due to lattice mismatch in the layer interfaces.
US09583394B2
The present invention provides a method for forming a semiconductor structure, comprising: firstly, a substrate is provided, having a first fin structure and a second fin structure disposed thereon, next, a first isolation region is formed between the first fin structure and the second fin structure, a second isolation region is formed opposite the first fin structure from the first isolation region, and at least an epitaxial layer is formed on the side of the first fin structure and the second fin structure, wherein the epitaxial layer has a bottom surface, the bottom surface extending from the first fin structure to the second fin structure, and the bottom surface is lower than a bottom surface of the first isolation region and a top surface of the second isolation region, in addition, the epitaxial layer has a stepped-shaped sidewall profile.
US09583393B2
Embodiments of mechanisms for epitaxially growing one or more doped silicon-containing materials to form source and drain regions of finFET devices are provided in this disclosure. The dopants in the one or more doped silicon-containing materials can be driven into the neighboring lightly-doped-drain (LDD) regions by thermal anneal to dope the regions. The epitaxially growing process uses a cyclical deposition/deposition/etch (CDDE) process. In each cycle of the CDDE process, a first and a second doped materials are formed and a following etch removes most of the second doped material. The first doped material has a higher dopant concentration than the second material and is protected from the etching process by the second doped material. The CDDE process enables forming a highly doped silicon-containing material.
US09583392B2
A system and method for manufacturing a carbon layer is provided. An embodiment comprises depositing a first metal layer on a substrate, the substrate comprising carbon. A silicide is epitiaxially grown on the substrate, the epitaxially growing the silicide also forming a layer of carbon over the silicide. In an embodiment the carbon layer is graphene, and may be transferred to a semiconductor substrate for further processing to form a channel within the graphene.
US09583391B2
There is provided a wafer processing method including a modified layer forming step. In the wafer processing method, the power of a pulse laser beam set in the modified layer forming step is set to a power that forms modified layers and cracks in such a manner that a wafer is allowed to be divided into individual device chips before the thickness of the wafer reaches a finished thickness and, after the wafer is divided into the individual device chips, the time until the thickness of the wafer reaches the finished thickness is such a time that damage due to rubbing of the individual device chips against each other is not caused through grinding under a predetermined grinding condition set in a back surface grinding step.
US09583390B2
Electronic assemblies and their manufacture are described. One embodiment relates to a method including depositing an organic thin film layer on metal bumps on a semiconductor wafer, the organic thin film layer also being formed on a surface adjacent to the metal bumps on the wafer. The wafer is diced into a plurality of semiconductor die structures, the die structures including the organic thin film layer. The semiconductor die structures are attached to substrates, wherein the attaching includes forming a solder bond between the metal bumps on a die structure and bonding pads on a substrate, and wherein the solder bond extends through the organic thin film layer. The organic thin film layer is then exposed to a plasma. Other embodiments are described and claimed.
US09583389B2
Selective area deposition of metal films by atomic layer deposition (ALD) and chemical vapor deposition (CVD) is described. In an example, a method of fabricating a metallization structure for an integrated circuit involves forming an exposed surface above a substrate, the exposed surface including regions of exposed dielectric material and regions of exposed metal. The method also involves forming, using a selective metal deposition process, a metal layer on the regions of exposed metal without forming the metal layer on the regions of exposed dielectric material.
US09583382B2
A semiconductor device includes a first insulating layer, a second insulating layer formed on the first insulating layer, a plurality of interconnection lines formed in the second insulating layer, and a first air gap disposed between the first insulating layer and the second insulating layer to surround a lower part of the interconnection lines.
US09583381B2
Methods of forming semiconductor devices and features in semiconductor device structures include conducting an anti-spacer process to remove portions of a first mask material to form first openings extending in a first direction. Another anti-spacer process is conducted to remove portions of the first mask material to form second openings extending in a second direction at an angle to the first direction. Portions of a second mask material underlying the first mask material at intersections of the first openings and second openings are removed to form holes in the second mask material and to expose a substrate underlying the second mask material.
US09583380B2
In one example, a method includes forming a mask layer above or in a dielectric material. The dielectric material is exposed to photon radiation in an ambient atmosphere comprising a carbon gettering agent to generate damaged portions of the dielectric material. The mask layer blocks the photon radiation. The damaged portions of the dielectric material are removed.
US09583362B2
The present disclosure provides a semiconductor structure includes a semiconductor layer having a first surface, and an interlayer dielectric (ILD) defining a metal gate over the first surface of the semiconductor layer. The metal gate includes a high-k dielectric layer, a barrier layer, and a work function metal layer. A thickness of a first portion of the barrier layer at the sidewall of the metal gate is substantially thinner than a thickness of the barrier layer at the bottom of the metal gate. The present disclosure provides a method for manufacturing a semiconductor structure. The method includes forming a metal gate trench in an ILD, forming a barrier layer in a bottom and a sidewall of the metal gate trench, removing a first portion of the barrier layer at the sidewall of the metal gate trench, and forming a work function metal layer conforming to the barrier layer.
US09583361B2
A method of processing a target object includes (a) exposing a resist mask to active species of hydrogen generated by exciting plasma of a hydrogen-containing gas within a processing vessel while the target object is mounted on a mounting table provided in the processing vessel; and (b) etching a hard mask layer by exciting plasma of an etchant gas within the processing vessel after the exposing of the resist mask to the active species of hydrogen. The plasma is excited by applying of a high frequency power for plasma excitation to an upper electrode. In the method, a distance between the upper electrode and the mounting table in the etching of the hard mask layer ((b) process) is set to be larger than a distance between the upper electrode and the mounting table in the exposing of the resist mask to the active species of hydrogen ((a) process).
US09583360B2
In one embodiment, a substrate processing apparatus, includes: a chamber; a first electrode disposed in the chamber; a second electrode disposed in the chamber to face the first electrode, and to hold a substrate; an RF power supply to apply an RF voltage with a frequency of 50 MHz or more to the second electrode; and a pulse power supply to repeatedly apply a voltage waveform including a negative voltage pulse and a positive voltage pulse of which delay time from the negative voltage pulse is 50 nano-seconds or less to the second electrode while superposing on the RF voltage.
US09583350B2
A memory device comprises a first conductive stripe, a first memory layer, a first conductive pillar, a first dielectric layer and a first conductive plug. The first conductive strip extends along a first direction. The first memory layer extends along a second direction adjacent to and overlapping with the first conductive stripe to define a first memory area thereon. The first conductive pillar extends along the second direction and overlapping with the first memory area. The first dielectric layer extends along the second direction adjacent to the first conductive stripe, the first memory layer and the first conductive pillar. The first conductive plus extends along the second direction and at least overlaps with a portion of the first conductive stripe, wherein the first conductive plus is electrically insulated from the first conductive stripe, the first memory layer and the first conductive pillar by the first dielectric layer.
US09583345B2
A method of fabricating a semiconductor device includes forming a first layer over a substrate and forming a second layer over the first layer. The method further includes patterning the second layer into a mask having one or more openings that expose portions of the first layer. The method further includes etching the first layer through the one or more openings via a first etching process, resulting in a patterned first layer. The first etching process includes forming a coating layer around both the mask and the patterned first layer while the first layer is being etched.
US09583335B2
Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of Zr(MeCp)(NMe2)3, Zr(EtCp)(NMe2)3, ZrCp(NMe2)3, Zr(MeCp)(NEtMe)3, Zr(EtCp)(NEtMe)3, ZrCp(NEtMe)3, Zr(MeCp)(NEt2)3, Zr(EtCp)(NEt2)3, ZrCp(NEt2)3, Zr(iPr2Cp)(NMe2)3, Zr(tBu2Cp)(NMe2)3, Hf(MeCp)(NMe2)3, Hf(EtCp)(NMe2)3, HfCp(NMe2)3, Hf(MeCp)(NEtMe)3, Hf(EtCp)(NEtMe)3, HfCp(NEtMe)3, Hf(MeCp)(NEt2)3, Hf(EtCp)(NEt2)3, HfCp(NEt2)3, Hf(iPr2Cp)(NMe2)3, Hf(tBu2Cp)(NMe2)3, and mixtures thereof; and depositing the dielectric film on the substrate.
US09583321B2
A mass spectrometry method comprises: introducing a first portion of a sample of ions including precursor ions comprising a first precursor-ion mass-to-charge (m/z) ratio into a first mass analyzer; transmitting the precursor ions from the first mass analyzer to a reaction or fragmentation cell such that a first population of product ions are continuously accumulated therein over a first accumulation time duration; initiating release of the accumulated first population of product ions from the reaction or fragmentation cell; continuously transmitting the released first population of product ions from the reaction cell to a second mass analyzer; transmitting a portion of the released first population of product ions comprising a first product-ion m/z ratio from the second mass analyzer to a detector; and detecting a varying quantity of the product ions having the first product-ion m/z ratio for a predetermined data-acquisition time period after the initiation of the release.
US09583320B2
The invention relates to a method for the quantitative determination of a chemical substance S from a sample using a mass spectrometer having at least one detector. In line with the invention, a sample which may contain the substance S of interest, or a conversion product of the sample, is analyzed in the mass spectrometer. For the analysis the mass spectrometer is alternately set at least for masses SM1, SM2, so that each of the masses is detected multiple times and all of said masses are detected by the same detector. The masses SM1 and SM2 are fictitious neighboring masses for a mass CM of the substance S with a particular isotope content. The quantity of the mass CM is ascertained by means of calculation from the measured values for the masses SM1, SM2.
US09583311B2
At least one drawing apparatus according to an exemplary embodiment includes a plurality of optical systems and repeats an operation to draw a pattern on a substrate while partly overlapping stripe-shaped regions drawn by the optical systems. The drawing apparatus includes a creation unit configured to create data to be supplied to each of the plurality of optical systems by using a plurality of sub pattern data, each of the plurality of sub pattern data serving as unit data of pattern data used by the plurality of optical systems, corresponding to a region having a width obtainable by dividing the stripe-shaped regions in a drawing width direction, and including information relating to continuity of drawing instruction data and exposure amount information. The creation unit is configured to create the data by changing exposure amount information corresponding to an overlapping drawing region based on the information relating to the continuity.
US09583309B1
Apparatus and methods for the selective implanting of the outer portion of a workpiece are disclosed. A mask is disposed between the ion beam and the workpiece, having an aperture through which the ion beam passes. The aperture may have a concave first edge, forming using a radius equal to the inner radius of the outer portion of the workpiece. Further, the mask is affixed to a roplat such that the platen is free to rotate between a load/unload position and an operational position without moving the mask. In certain embodiments, the mask is affixed to the base of the roplat and has a first portion with an aperture that extends vertically upward from the base, and a second portion that is shaped so as not to interfere with the rotation of the platen. In other embodiments, the mask may be affixed to the arms of the roplat.
US09583308B1
An apparatus, referred to as a light bath, is disposed in a beamline ion implantation system and is used to photoionize particles in the ion beam into positively charged particles. Once positively charged, these particles can be manipulated by the various components in the beamline ion implantation system. In certain embodiments, a positively biased electrode is disposed downstream from the light bath to repel the formerly non-positively charged particles away from the workpiece. In certain embodiments, the light bath is disposed within an existing component in the beamline ion implantation system, such as a deceleration stage or a Vertical Electrostatic Energy Filter. The light source emits light at a wavelength sufficiently short so as to ionize the non-positively charged particles. In certain embodiments, the wavelength is less than 250 nm.
US09583304B2
A processing apparatus for processing a substrate in a vacuum processing space in a chamber includes a shield arranged in the chamber, and a holding portion configured to hold the shield by a magnetic force. The holding portion has a holding surface on which a first magnet is arranged. The shield includes a second magnet configured to generate an attraction force with respect to the first magnet, and a receiving portion configured to receive a tool configured to move the shield with respect to the holding portion.
US09583298B2
Nano granular materials (NGM) are provided that have the extraordinary capability to conduct current in a 100 fold current density compared to high Tc superconductors by charges moving in form of Bosons produced by Bose-Einstein-Condensation (BEC) in overlapping excitonic surface orbital states at room temperature and has a light dependent conductivity. The material is disposed between electrically conductive connections and is a nano-crystalline composite material. Also provided are electrical components comprising NGM and methods and arrangements for making it by corpuscular-beam induced deposition applied to a substrate, using inorganic compounds being adsorbed on the surface of the substrate owing to their vapor pressure, and which render a crystalline conducting phase embedded in an inorganic insolating matrix enclosing the material.
US09583297B2
A fuse operation indicator assembly includes an elongate tube having first and second ends, a fuse striker receiving member at the first end of the tube and configured to receive a fuse striker, an actuating member at the second end of the tube and configured to be actuated responsive to the fuse striker member, and a detector configured to detect actuation of the actuating member.
US09583289B2
An electrical switching device including an electric power switching module including a block of three input terminals and three output terminals, each input or output terminal being connected to a stationary contact of an electrical switch also including a mobile contact, configured to switch between an open position and a closed position, the mobile contact configured to be moved by an electromagnetic drive mechanism, and a control module, including at least one control input terminal and at least one control output terminal. The control module includes the electromagnetic drive mechanism configured to be supplied by the control terminals to control a position of one of the mobile contacts. A supervision module includes an auxiliary input contact terminal and two auxiliary output contact terminals, the auxiliary input contact terminal being shared by the two auxiliary output contact terminals, the power module being removable separately from the control and supervision modules.
US09583287B2
A switch device includes a circuit module and a pressing module. The circuit module includes a plurality of pushbuttons and a light-emitting member that emits light having different colors when the pushbuttons are pressed. The pressing module includes an operating unit, a driven member and a pressing member. The driven member is moved alternately to a retracted position and a projecting position as a result of depression of the operating unit. The pressing member is connected to the driven member to press one of the pushbuttons when the driven member is at the projecting position, such that one of the colors of the light corresponding to the one of the pushbuttons is visible through the operating unit.
US09583284B2
There is provided a tap changer in which movable contacts rotate to be selectively connected to a plurality of taps. The tap changer includes a rotatable upper movable contact; a rotatable lower movable contact electrically connected to the upper movable contact; a driving shaft rotating the upper movable contact and the lower movable contact integrally; a single-type fixed contact including a single terminal connected to any one of a plurality of taps; and a dual-type fixed contact including a first terminal and a second terminal connected together to another of the plurality of taps. Since the upper movable contact and the lower movable contact are integrally rotated through the single driving shaft, the number of components and volume of the device may be reduced and an operation of the device may be facilitated.
US09583280B2
An electricity storage device maintains low internal resistance and high electric capacity. The nonaqueous-electrolytic-solution hybrid electricity storage device employs an anode into/from which lithium can be intercalated and deintercalated and a cathode including activated carbon, even after high-temperature storage and/or high-temperature charging/discharging. Specifically, this electricity storage device includes an anode into/from which lithium can be intercalated and deintercalated, a cathode that includes activated carbon, and a nonaqueous electrolytic solution, wherein the electricity storage device employs a nonaqueous electrolytic solution that includes at least one type of compound represented by one of general formulas (1) to (5). Details on the general formulas (1) to (5) are as described in the Description.
US09583277B2
Ultra-capacitor structures and electronic systems and assemblies are provided. In one aspect, the ultra-capacitor structure is configured to selectively power and at least partially house electronic component(s) therein. In one embodiment, the ultra-capacitor structure includes a thermally conductive material facilitating dissipation of heat generated. In another embodiment, the ultra-capacitor structure includes an electrically conductive sheet facilitating electromagnetic shielding. In another aspect, an electronic system includes: an electronic device including electronic component(s); and a support structure physically receiving and electrically coupling to the electronic device, and including an ultra-capacitor structure configured to selectively power the electronic component(s) of the electronic device when electrically coupled to the support structure. In another aspect, an electronic assembly has a first region including electronic component(s), and a second region including an ultra-capacitor structure configured to selectively power the electronic component(s) of the electronic assembly, where the first region is spaced apart from the second region.
US09583255B2
A surge blocking inductor. In one embodiment, the surge blocking inductor includes a core; a first winding wound about the core in a first direction; and a second winding wound about the core in a second direction, wherein the first winding and the second winding are magnetically independent when the core is in a non-saturated state, and wherein the first winding and the second winding are coupled magnetically when the core is in a saturated state.
US09583245B2
A magnet plate assembly includes a plurality of magnetic substances having predetermined magnetic forces, a magnet supporter supporting at least a corresponding one of the plurality of magnetic substances, and a guide support supporting the magnet supporter and comprising at least one guide opening. The magnetic plate assembly further includes a coupler extending through the at least one guide opening and movable within the at least one guide opening, the coupler being connected to the magnet supporter; and a driver unit connected to the coupler and configured to move the corresponding one of the plurality of magnetic substances with respect to the guide support.
US09583244B2
A bonded magnet is provided which includes first and second components. The first and second components have first and second non-action surfaces, and first and second action surfaces that intersect the first and second non-action surfaces, respectively. First and second flux groups curve inside the first and second components from the first and second non-action surfaces to the first and second action surfaces, respectively. The areas of the first and second non-action surfaces are greater than the first and second action surfaces, respectively. The flux densities on the first and second action surfaces are higher than the first and second non-action surfaces, respectively. The pole on the first non-action surface is opposite to the second non-action surface. The first and second non-action surfaces are coupled to each other. The first flux groups continuously extend from one to another.
US09583243B2
Permanent magnet and method for manufacturing the same, and motor and power generator using the same
In an embodiment, a permanent magnet includes a composition of R (FepMqCur(Co1-sAs)1-p-q-r)z (R: rare earth element, M: Ti, Zr, Hf, A: Ni, V, Cr, Mn, Al, Si, Ga, Nb, Ta, W, 0.05≦p 0.6, 0.005≦q≦0.1, 0.01≦r≦0.15, 0≦s≦0.2, 4≦z≦9). The permanent magnet includes a two-phase structure of a Th2Zn17 crystal phase and a copper-rich phase. An average interval between the copper-rich phases in a cross section including a crystal c axis of the Th2Zn17 crystal phase is in a range of over 120 nm and less than 500 nm.
US09583240B2
The present disclosure relates to a semiconductor structure comprising a positive temperature coefficient thermistor and a negative temperature coefficient thermistor, connected to each other in parallel by means of connecting elements which are configured such that the resistance resulting from the parallel connection is substantially stable in a predetermined temperature range, and to a corresponding manufacturing method.
US09583236B2
A method of manufacturing an improved overhead or underground telephone lead-in cable for transmission services VVDL (voice, video, data and lead-in) that permits the connection of the users to the public telephone system with a high speed digital service link, besides the analog services required. The cable has at least one or a plurality of transmission circuits. One of the transmission circuit is formed by two metal conductor elements cooperating in turn to self-support the cable or a conventional type of impregnated fibers or kevlar tape. The second circuit which is formed by a stranded pair of conductors is impregnated with a swelling powder preventing moisture penetration.
US09583234B2
The present invention relates to an insulated electric wire for an automobile containing a conductor and an insulating coating layer which coats the conductor, the insulating coating layer being formed of a non-crosslinkable resin composition containing 65 to 90 parts by weight of a polypropylene-based resin, 10 to 40 parts by weight of a metal hydroxide, 20 to 50 parts by weight of a bromine-based flame retardant, 5 to 30 parts by weight of antimony trioxide, and 2 to 15 parts by weight of a maleic acid-modified resin in the ratio and further containing at least one of 3 to 10 parts by weight of a polyethylene resin and 2 to 10 parts by weight of an ethylene-based copolymer.
US09583214B2
A semiconductor circuit includes a test control unit configured to generate a driving activation signal and a sensing activation signal in response to a command and an address; a pad; a driver configured to drive the pad to a predetermined level in response to activation of the driving activation signal; and a sensing unit configured to compare a voltage level of the pad with a reference voltage in response to activation of the sensing activation signal, and output a sensing signal.
US09583208B2
A circuit detects values stored in bit cells of a memory circuit, for example, a memory circuit with single ended sensing. The circuit injects a charge into a bit line coupled to a bit cell to detect the value stored in the bit cell. A level detector detects the voltage level of the bitline as the charge in injected in the bitline. The sensing circuit determines the bit value stored during the charge injection phase. If the bitline voltage reaches above a high threshold voltage level as the charge in injected in the bitline, the circuit determines that the bit cell stores a first bit value (for example, bit value 1.) If the bitline voltage stays below a low threshold voltage level as the charge in injected in the bitline, the circuit determines that the bit cell stores a second bit value (for example, bit value 0).
US09583203B2
A semiconductor memory device includes a memory cell suitable for having a predetermined cell state based on a data stored therein, a control signal generation unit suitable for generating a control signal for changing the cell state of the memory cell during a reading operation, an information storage unit suitable for storing a variation status information of the control signal to which a moment when the cell state of the memory cell changes is reflected, and an output unit suitable for outputting the variation status information of the control signal stored in the information storage unit as a signal corresponding to the data stored in the memory cell.
US09583196B2
A system and method of programming user data into a memory cell includes receiving a first user data to be programmed in a memory controller, selecting a memory cell for programming the first user data and measuring at least one health characteristic of the selected memory cell. At least one programming parameter of the selected memory cell is adjusted and the first user data is programmed to the selected memory cell using the adjusted programming parameter corresponding to the selected memory cell.
US09583193B2
Integrated non-volatile memory device includes an integrated memory cell of the EEPROM type with a floating-gate transistor and a selection transistor connected in series between a source line and a bit line, and a programming circuit for the memory cell. The selection transistor is connected between the floating-gate transistor and the source line. The programming circuit is configured for programming the at least one memory cell with a programming voltage split between a positive voltage and a negative voltage.
US09583191B1
In one embodiment, a programming content addressable memory (CAM) comprising at least one match line, the at least one match line being preloaded to high, and being logically OR-ed for all selector lines the at least one match line being inverted to low upon a match result the at least one match line comprising transistors and grounding which are activated only when a stored data value and a corresponding selector line evaluate to 1 and the corresponding selector line having a logical AND with the stored data value, wherein the programming CAM is implemented as a Bit Indexed Explicit Replication (BIER) table. Related apparatus, systems and methods are also described.
US09583185B1
Phase change memory devices, systems, and associated methods are provided and described. Such devices, systems, and methods manage and reduce voltage threshold drift to increase read accuracy of phase change memory. A pre-read pulse can be delivered across a select device and a phase change material of a phase change memory cell to at least partially reset the voltage threshold drift of the select device while maintaining a program state of the phase change material.
US09583184B2
Methods and apparatus are provided for determining level-thresholds for q-level memory cells. A group of the memory cells are read to obtain respective read signal components. The read signal components are processed in dependence on signal level to produce a signal level vector, comprising a series of elements, indicative of the distribution of read signal components in order of signal level. A plurality of possible sets of q−1 elements corresponding, respectively, to q−1 level-thresholds which partition the signal level vector into q segments, is then defined. The q−1 level-thresholds for the group of memory cells are then determined by selecting from said possible sets that set for which a predetermined difference function, dependent on differences in signal level for elements in each of said q segments for the set, has an optimum value.
US09583182B1
A multi-level memory management circuit can remap data between near and far memory. In one embodiment, a register array stores near memory addresses and far memory addresses mapped to the near memory addresses. The number of entries in the register array is less than the number of pages in near memory. Remapping logic determines that a far memory address of the requested data is absent from the register array and selects an available near memory address from the register array. Remapping logic also initiates writing of the requested data at the far memory address to the selected near memory address. Remapping logic further writes the far memory address to an entry of the register array corresponding to the selected near memory address.
US09583177B2
A memory cell retains (N−1)-bit data (N is an integer of more than 1) and an error detection bit. The memory cell has 2N data states A_1 to A_2N. Error detection bits for the data states A_i (i is 1 and an even number more than or equal to 4 and less than or equal to 2N) among the 2N data states are assigned “1” (normal), and the error detection bits for the other data states are assigned “0” (abnormal). The memory cell is brought to have the state A_i by a writing operation. During a reading operation, the error detection bit is not read out from the memory cell. The error detection bit together with the (N−1)-bit data is read out for refresh. If the error detection bit is “0”, refresh for bringing the error detection bit back to data state with the error detection bit “1” is performed.
US09583176B1
Systems, apparatuses and methods may provide for determining a status of an enable signal and selecting a leaker resistance from a plurality of leaker resistances based at least in part on the status of the enable signal. Additionally, the selected leaker resistance may be applied to a data strobe line of a memory bus. In one example, the selected leaker resistance reduces ringback noise on the data strobe line.
US09583173B2
A semiconductor device may include a power control signal generator and a sense amplifier circuit. The power control signal generator may generate a first power control signal, an enablement moment of the first power control signal controlled according to a logic level combination of temperature code signals in response to a mode signal. The sense amplifier circuit may generate a first power signal driven in response to the first power control signal and may generate a second power signal driven in response to a second power control signal. The sense amplifier circuit may sense and amplify a level of a bit line using the first power signal and the second power signal.
US09583171B2
Aspects disclosed in the detailed description include write driver circuits for resistive random access memory (RAM) arrays. In one aspect, a write driver circuit is provided to facilitate writing data into a resistive RAM array in a memory system. The write driver circuit is coupled to a selector circuit configured to select a memory bitcell(s) in the resistive RAM array for a write operation. An isolation circuit is provided in the write driver circuit to couple a current source to the selector circuit to provide a write voltage during the write operation and to isolate the current source from the selector circuit when the selector circuit is not engaged in the write operation. By isolating the selector circuit from the current source when the selector circuit is on standby, it is possible to reduce leakage current in the selector circuit, thus reducing standby power consumption in the memory system.
US09583155B1
An apparatus includes a first circuit, a second circuit, and a third circuit. The first circuit may be configured to (i) reduce a current value in a sequence of input values that have been carried on a single-ended line of a data bus coupled to a memory channel to generate a version of the current value, and (ii) reduce a first reference voltage to generate a second reference voltage. The second circuit may be configured to slice the current value with respect to the first reference voltage to generate a first intermediate value. The third circuit may be configured to slice the version of the current value with respect to the second reference voltage to generate a second intermediate value. The first intermediate value and the second intermediate value generally define a sliced value of the current value.
US09583153B1
A data storage device (DSD) with improved manufacturing method. The DSD includes a main printed circuit board (PCB) that includes a first PCB connector and a second PCB connector. The DSD also includes a first flash card mounted over the main PCB and including a flash memory and a flash card connector configured to connect to the first PCB connector, and a second flash card mounted over the main PCB and including a flash memory and a flash card connector configured to connect to the second PCB connector. The first flash card and the second flash card are mounted over the main PCB in a plane substantially parallel with the main PCB. The main PCB can be mounted to a base before connecting the first and second flash cards, or the first and second flash cards can be mounted to the main PCB before mounting to the base.
US09583148B2
Systems, methods, and devices for media electronic cues that involve determining a position of the media electronic within the display screen displaying time-based media and a time for displaying the media electronic based on the playback time of the media, its content, product placement data, and so on. The electronic cue may be a visual cue, and auditory cue, or a combination thereof.
US09583132B2
A device for rotary driving of a round disk, for instance a memory disk of a computer, comprises a stator disposed fixedly relative to a frame and a rotor rotatably drivable relative to the stator.According to the invention the rotor comprises a concentric ring to which the peripheral edge of the disk is connected.The stator has an encircling recess, the form of which corresponds to that of the ring such that the ring fits with clearance into the recess. The rotor is provided with two collars of magnetically active elements in angularly equidistant arrangement, and the stator comprises electromagnets disposed at the same angular distances.The arrangement is such that the rotor and the stator together form an annular induction motor.The rotor is preferably suspended magnetically during operation.
US09583130B2
According to the disclosure, a unique and novel archiving system that allows the digital shredding of archived data is disclosed. Embodiments of the archiving system include removable disk drives that store data, which may be erased such that the data is considered destroyed but that allows the removable disk drive to be reused. The archiving system can determine which data should be erased. Then, the data is digitally shredded such that the removed data cannot be retrieved or deciphered. In alternative embodiments, a protection may be placed on the data required to be kept because the data is associated with a legal suit. This “legal hold” prevents the data from being digitally shredded. As such, the archiving system can provide a system that can dispose of data on a file-by-file or granular level without physically destroying the media upon which the data is stored.
US09583129B2
An aspect of the present invention relates to a method of manufacturing hexagonal ferrite magnetic powder. The method of manufacturing hexagonal ferrite magnetic powder comprises wet processing hexagonal ferrite magnetic particles obtained following acid treatment in a water-based solvent to prepare an aqueous magnetic liquid satisfying relation (1) relative to an isoelectric point of the hexagonal ferrite magnetic particles: pH0−pH*≧2.5, wherein, pH0 denotes the isoelectric point of the hexagonal ferrite magnetic particles and pH* denotes a pH of the aqueous magnetic liquid, which is a value of equal to or greater than 2.0, adding a surface-modifying agent comprising an alkyl group and a functional group that becomes an anionic group in the aqueous magnetic liquid to the aqueous magnetic liquid to subject the hexagonal ferrite magnetic particles to a surface-modifying treatment, and removing the water-based solvent following the surface-modifying treatment to obtain hexagonal ferrite magnetic particles.
US09583128B2
A magnetic-disk glass substrate according to the present invention is a doughnut-shaped magnetic-disk glass substrate having a circular hole provided in the center, a pair of main surfaces, and an outer circumferential end surface and an inner circumferential end surface each including a side wall surface and a chamfered surface that is formed between each main surface and the side wall surface. A measurement point is provided on the outer circumferential end surface every 30 degrees in the circumferential direction with reference to a center of the glass substrate, and when a curvature radius of a shape of a portion between the side wall surface and the chamfered surface is determined at each measurement point, the difference in the curvature radius between neighboring measurement points is 0.01 mm or less.
US09583121B2
Co-location of devices is determined by receiving at a query engine from a device, a remote audio signature and associated remote device identification and device location data and comparing in the query engine remote audio signatures stored in a database to the remote audio signature. The remote database further stores remote device identification and device location data associated with the stored audio signatures. The query engine only performs the comparisons for remote audio signatures that have the same location data. The query engine thereby limits its query set of remote audio signatures in the database. A processor reports a remote device identification associated with the remote audio signature of the device received over the communication channel and the remote device identification associated with the stored remote audio signature when an audio signature received over the communication channel matches an audio signature stored in the database within a threshold confidence level.
US09583117B2
Techniques for efficiently encoding an input signal are described. In one design, a generalized encoder encodes the input signal (e.g., an audio signal) based on at least one detector and multiple encoders. The at least one detector may include a signal activity detector, a noise-like signal detector, a sparseness detector, some other detector, or a combination thereof. The multiple encoders may include a silence encoder, a noise-like signal encoder, a time-domain encoder, a transform-domain encoder, some other encoder, or a combination thereof. The characteristics of the input signal may be determined based on the at least one detector. An encoder may be selected from among the multiple encoders based on the characteristics of the input signal. The input signal may be encoded based on the selected encoder. The input signal may include a sequence of frames, and detection and encoding may be performed for each frame.
US09583113B2
An approach is provided for creating a digital representation of an analog sound. The approach retrieves a number of digital sound data streams with each of the digital sound data streams corresponding to an orientation angle of the digital sound data streams with respect to one another. The digital representation of the analog sound is generated by processing the digital sound data streams and their corresponding orientation angles.
US09583111B2
A method for packet loss concealment, that includes: continuously receiving a digital audio stream; extracting audio features from the digital audio stream while the digital audio stream is unharmed; and upon detecting a gap in the digital audio stream, filling the gap with one or more previous segments of the digital audio stream, wherein the filling is based on a matching of the one or more of the extracted audio features with one or more audio features adjacent to the gap.
US09583106B1
Methods, systems, and media for presenting interactive audio content are provided. In some embodiments, the method includes: receiving narrative content that includes action points, wherein each of the action points provides user actions and a narrative portion corresponding to each of the user actions; determining a user engagement density associated with the narrative content, wherein the user engagement density modifies the number of the action points to provide within the narrative content; causing the narrative content to be presented to a user based on the user engagement density; determining that a speech input has been received at one of the action points in the narrative content; converting the speech input to a text input; determining whether the user action associated with the text input corresponds to one of the user actions; selecting the narrative portion corresponding to the text input in response to determining that the user action corresponds to one of the user actions; converting the selected narrative portion to an audio output; and causing the narrative content with the converted audio output of the selected narrative portion to be presented to the user.
US09583103B2
According to various embodiments, a method for an electronic device includes receiving an input of a first word from a keypad, recognizing a voice input and converting the voice input into a text including a second word, in response to determining that the second word is erroneously recognized based on the first word, correcting the text by replacing the second word with the first word, and entering the corrected text. An electronic device for recognizing a voice includes a keypad configured to receive an input of a first word, a sensor configured to recognize a voice input, a controller configured to convert the voice input into a text including a second word, in response to determining that the second word is erroneously recognized based on the first word, correct the text by replacing the second word with the first word, and enter the corrected text.
US09583101B2
The present invention discloses a speech interaction method and apparatus, and pertains to the field of speech processing technologies. The method includes: acquiring speech data of a user; performing user attribute recognition on the speech data to obtain a first user attribute recognition result; performing content recognition on the speech data to obtain a content recognition result of the speech data; and performing a corresponding operation according to at least the first user attribute recognition result and the content recognition result, so as to respond to the speech data. According to the present invention, after speech data is acquired, user attribute recognition and content recognition are separately performed on the speech data to obtain a first user attribute recognition result and a content recognition result, and a corresponding operation is performed according to at least the first user attribute recognition result and the content recognition result.
US09583080B1
A beater for a drum pedal has a main body, a sleeve, a striking head, a distance adjusting unit, an inner fastening unit, an angular adjusting unit, a fastening set, and a stem. The sleeve is mounted around the main body. The striking head is mounted on the sleeve. The distance adjusting unit is mounted inside the main body. The inner fastening unit is mounted inside the distance adjusting unit. The angular adjusting unit is mounted through the distance adjusting unit and the inner fastening unit. The fastening set is connected to the inner fastening unit and abuts against the sleeve. The stem penetrates the sleeve, the main body, the inner fastening unit, and is connected to the angular adjusting unit. Operating the fastening set can tighten or loosen the inner fastening unit and adjust the distance adjusting unit and the angular adjusting unit.
US09583074B2
A system, computer-implemented method and computer-readable medium for labeling an image. A two-dimensional street-level image and a three-dimensional model representing at least a portion of the image's content are received. Data representing a label to annotate at least a portion of a building in the two dimensional image is also received. A determination is made using the three dimensional mode as to where position the label for presentation within the two-dimensional model such that the label does not obscure presentation of the building in the two-dimensional image.
US09583073B1
A constant current LED driver with adaptive startup voltage control is generally configured to provide output current to an LED load. A controller is configured to sense the output current, and to provide driving control signals as a function thereof to maintain the sensed current at a target current. During startup operation, the controller provides driving control signals further as a function of a first defined maximum output voltage value. During steady state operation, the driving control signals are provided as a function of a second defined maximum output voltage value. The maximum values may be set according to forward voltage drop values for the LED load in association with first and second temperatures, respectively. During transition operations, the maximum output voltage value is continuously adjusted between the first and second maximum output voltage values, such that the LED load exceeds its warm up time prior to steady state operation.
US09583069B2
Implementations relate to systems and methods for detection and management of viewing conditions. One or more sensor devices can be provided for a user to monitor, manage, and adjust viewing conditions to promote the health and the user's health and vision. The sensor device(s) can include a distance detection device, and others. The sensor device(s) can be or include one or more detachable devices which can be attached or affixed to eyeglasses or other wearable articles. Viewing conditions such as viewing an object or source for too long and/or at too close a distance can trigger various responses, such as a vibrating or other signal to break the concentration of focus to refresh the eyes. The sensor device(s) can also or instead be configured with user profiles to regulate the type or nature of content the user is viewing, for example to restrict television viewing by children using parental controls.
US09583059B2
The present invention provides a level shift circuit, an array substrate and a display device. The level shift circuit comprising: a first level non-inverting input terminal, a first level inverting input terminal, a second level non-inverting input terminal, a second level inverting input terminal, a level state transferring unit and a second level driving unit; the level state transferring unit receives a first level input through the first level non-inverting input terminal and the first level inverting input terminal, and transfers a high and low state of the input first level to the second level driving unit; the second level driving unit outputs a second level of a corresponding state to the second level non-inverting input terminal and the second level inverting input terminal according to the input high and low state, wherein the first level is not equal to the second level.
US09583057B2
Provided are a pixel circuit and a display device which support multi-gradation display and can prevent display quality from deteriorating with low power consumption. A pixel circuit (3) includes a first switch circuit (22) provided between a pixel node Np of a display element unit (21) and a data signal line SL, and a memory circuit (23) which restores the pixel node to an initial voltage state, based on a hold voltage stored in a storage node Nm. The memory circuit (23) includes a transistor T1 having a gate electrode connected to the storage node Nm, and a source electrode connected to the pixel node Np; a second switch circuit (24) which controls a conducting state between a drain electrode of the transistor T1 and a voltage supply line VSL, in response to a signal level of a first control signal line SWL; a third switch circuit (25) which controls a conducting state between the drain electrode and the gate electrode of the transistor T1, in response to a signal level of a second control signal line CSL; and a capacitor element Cst provided between the storage node Nm and the voltage supply line VSL.
US09583056B2
A pixel structure including a first electrode layer, a second electrode layer and a liquid crystal layer is provided. The first electrode layer includes a plurality of first electrodes and a plurality of second electrodes, wherein the first electrodes are used for receiving a first driving voltage, and the second electrodes are used for receiving a second driving voltage. The second electrode layer includes a plurality of third electrodes and a plurality of fourth electrodes, wherein the third electrodes are used for receiving a third driving voltage and the fourth electrodes are used for receiving a fourth driving voltage. The liquid crystal layer is disposed between the first electrode layer and the second electrode layer. The first electrodes and the second electrodes are alternately disposed along a first direction parallel to the liquid crystal layer, and the third electrodes and the fourth electrodes are alternately disposed along the first direction.
US09583053B2
A liquid crystal display device in which pixels having a memory function are arranged includes: a display drive unit performing display driving by a driving method for obtaining halftone gray scales by setting plural frames as one cycle and temporarily changing gray scales of respective pixels within one cycle; and a pixel drive unit supplying a voltage having the same phase as, or the reverse phase to, a common voltage the polarity of which is inverted in a given cycle and applied to counter electrodes of liquid crystal capacitors to pixel electrodes of the liquid crystal capacitors. The pixel drive unit supplies an intermediate voltage between high- and low-voltage sides of the common voltage to the pixel electrodes of the liquid crystal capacitors at the time of transition from the supply of the voltage having the same phase to the supply of the voltage having reverse phase.
US09583043B2
Provided are an organic light emitting display and a method of manufacturing the same. The organic light emitting display includes: a display panel including a plurality of pixels, each pixel including: a light emitting element, and a driving element to drive the light emitting element, a data driving circuit to, within one horizontal display period: write sensing data to a pixel on a horizontal display line through a data line, sense the pixel current of the pixel through a reference line, and then write display data compensated by a first offset compensation value to the pixel, an offset calculator to calculate a second offset compensation value for compensating changes in the driving element over time based on the sensed value of the pixel current, and an offset memory to update the pre-stored first offset compensation value with the second offset compensation value when display data writing is stopped.
US09583041B2
The present invention discloses a pixel circuit and a driving method thereof, a display panel, and a display device, so as to improve brightness uniformity. The pixel circuit in the present invention comprises a control sub-circuit, a compensation sub-circuit, a driving transistor and a light emitting device. The present invention enables the driving current that drives the light emitting device to emit light to be uncorrelated with the threshold voltage of the driving transistor, so as to improve display uniformity of the panel.
US09583032B2
Technology is disclosed herein to help a user navigate through large amounts of content while wearing a see-through, near-eye, mixed reality display device such as a head mounted display (HMD). The user can use a physical object such as a book to navigate through content being presented in the HMD. In one embodiment, a book has markers on the pages that allow the system to organize the content. The book could have real content, but it could be blank other than the markers. As the user flips through the book, the system recognizes the markers and presents content associated with the respective marker in the HMD.
US09583030B2
A display drive circuit of the invention has: an initial-color-gamut-apex-coordinate-storing unit capable of storing initial color gamut apex coordinates; a user-target-color-gamut-apex-coordinate-storing unit capable of storing user target color gamut apex coordinates; a saturation-expansion-coefficient-deciding unit for deciding expansion coefficients of saturation data based on the initial and user target color gamut apex coordinates; and an expansion unit for expanding saturations of display data based on the saturation expansion coefficients. The expansion coefficients of saturation data are decided based on the initial and user target color gamut apex coordinates, and saturations of display data are expanded according to the expansion coefficients. Thus, the degree of expanding the saturations can be controlled for each color gamut or each of R, G and B color properties of an LC display panel.
US09583025B2
Disclosed are methodologies, a system and components thereof and associated computer programs for providing training/testing of one or more users performing treatment of Sudden Cardiac Arrest (SCA) victims. The system provides computer controlled interactive instruction and testing methodologies that enable one or more users to be trained and/or tested using a plurality of mannequins including circuitry and hardware that enable each users compressions to analyzed for rate, depth and recoil to ensure that each user is performing the chest compressions properly. The data collected for determining rate, depth and recoil are collected via mannequin-specific hardware and electronics that utilize a plurality of magnets provided in proximity to a Hall Effect sensor. Data is collected at each mannequin and transmitted to at least one computer processing unit operating to receive, collect, analyze and display the data as well as store data for subsequent use in individualized training and certification of users.
US09583018B1
A RiG may simulate visual conditions of a real world environment, and generate the necessary amount of pixels in a visual simulation at rates up to 120 frames per second. RiG may also include a database generation system capable of producing visual databases suitable to drive the visual fidelity required by the RiG.
US09583005B2
Methods and systems are provided for monitoring an aircraft. An exemplary method involves capturing, by a computing system at a ground location, a flight tracking image associated with the aircraft that is displayed on a first display device at the ground location, and communicating the captured flight tracking image to the aircraft for display on a second display device onboard the aircraft.
US09583003B2
A pedestrian and a driver of a running vehicle that are in the vicinity of a stopped vehicle are notified of a danger of collision with a vehicle, without requiring the pedestrian to carry a communication terminal. A vehicle danger notification control apparatus includes an outside recognition arrangement for recognizing a running vehicle and/or a pedestrian as a moving object(s), a danger determination arrangement for determining whether there is a danger of collision(s) between the running vehicle and the pedestrian and/or between the running vehicles, and a danger notification arrangement for notifying, in a case in which the danger determination means determines that there is a collision danger, a driver of the running vehicle and/or the pedestrian of the collision danger.
US09582999B2
Method, systems, and devices are described for determining traffic volume of one or more path segments. A computing device may receive probe data associated with a road segment from one or more sources. The computing device selects either a free flow algorithm or a congestion algorithm for the probe data, and calculates an estimated probe quantity from historical data using either the free flow algorithm or the congestion algorithm. A traffic volume may be estimated from the estimate probe quantity.
US09582996B2
A codeset is described in a Public Codeset Communication Format (PCCF) as a format block including a plurality of fields having readily decipherable values, such as ASCII character values. One field is a mark/space information field that includes a sequence of mark time indicators and space time indicators for an operational signal of the codeset. A second field is a signal characteristic information field for the operational signal. Signal characteristic information may include carrier on/off information, repeat frame information, toggle control information, and last frame information. The PCCF is a codeset interchange format of general applicability.
US09582994B2
A particular device may configure one or more of other devices to accept and execute remote control commands from the particular device's remote control unit. This may be performed via one or more various communication links between the devices on that enables the devices to communicate with each other. For example, the remote control of a set-top box can be used to control both the set-top box and a television without a user having to specially program the set-top box or other universal remote control. One example of a communication link between the devices that enables the devices to communicate with each other is a device-to-device messaging protocol such as that provided by the High Definition Multimedia Interface (HDMI) standard.
US09582985B2
An emergency call failure mitigation apparatus, system and method includes a messaging subsystem that may be launched, upon receiving a call signaling indication pursuant to an emergency service call from a calling party that has failed to reach a local Public Safety Answering Point (PSAP). The messaging subsystem is operative to prompt the calling party to provide one or more responses relating to the emergency situation and generate a messaging object including at least one of the calling party's location, identity of a call receiving device associated with the calling party, type of the calling party and priority of the emergency service call determined based on one or more responses of provided by the calling party. In one embodiment, the messaging object may be forwarded to an entity operative to reach the calling party.
US09582980B2
An approach for providing intentional monitoring is provided. An alarm can be predefined with any number of metrics or thresholds for monitoring an electronic service. The predefined metrics and/or thresholds can be combined with one or more input variables selected by a customer or with one or more signals received from a network component. The alarm can be implemented using the predefined metrics, thresholds, and the one or more customer selected input variables or signals from the network component.
US09582977B2
A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.
US09582975B2
An apparatus is provided that includes a plurality of Bluetooth low energy devices (BLEs) embodied as stand-alone devices or incorporated into a respective security sensor, each at known locations within a secured geographic area, a plurality of portable wireless devices within the secured area, each receiving location information via signals from a nearby one or more of the plurality of BLEs, and a security system of the secured area that receives location information from the plurality of portable wireless devices, detects a security breach within the secured area, sends a notification to each of the plurality of wireless devices, and assigns a user of one of the plurality of portable wireless devices to investigate the breach based upon proximity of the one portable device to the breach.
US09582965B1
A system and method for incentivizing users to alter virtual item balances in an online game are disclosed. The incentives may include rewards for users to reach balance goals. The balance goals may specify target balances of virtual items to be reached in user inventories, and a time by which such target balances must be reached in order for the users to receive a reward. Such target balance may include minimum or maximum balances levels, a range of absolute balance levels, a change in the current balance levels of virtual items in the user inventories and/or any other target balances. Determinations whether a given user has reached such target balance in accordance with a balance goal may be made at or before the time specified in the balance goal.
US09582963B2
A gaming machine has a main or master gaming controller. Primary gaming machine accounting is performed by the master gaming controller in communication with a casino accounting system. A secondary controller is associated with the gaming machine. The secondary controller facilitates paragame activity. Secondary gaming machine accounting, such as associated with activities implemented by the secondary controller, is performed by the secondary controller in communication with a secondary accounting system. The secondary controller and secondary accounting system can also mirror or monitor primary gaming machine accounting.
US09582962B2
A computer-implemented method includes creating, by at least one processor, an online presence for a wagering game machine. The method also includes publishing wagering game activity that has occurred at the wagering game machine to the online presence for the wagering game machine.
US09582957B2
An electronic payment system is provided to comprise a mobile terminal 10 for emitting a remotely operable signal, a communications device 5 connected to an automated machine 1 for receiving remotely operable signal emitted from mobile terminal 10, and an automatic payment device 6 linked to a financial database 7. Communications device 5 retrieves from remotely operable signal an account number of a holder of the account at financial database 7. Payment device 6 receives a monetary signal indicative of a transaction fee, withdraws the amount of transaction fee from the correct holder's account to produce an authorization signal to communications device 5 that drives automated machine 1 without credit transaction.
US09582954B2
An article dispensing machine, system and method for authenticating an article returned to the article dispensing machine and an article for use in such a machine and system are disclosed herein. The returned article comprises an authentication code disposed on the surface of the returned article and a layer that is substantially opaque in visible light and at least partially overlays the authentication code. The article dispensing machine comprises a light source for illuminating the surface of the returned article so that the authentication code is visible through the layer, an image capture device for capturing an image of the authentication code when the surface is illuminated, and a processor for comparing the captured image to a master authentication code.
US09582947B2
Concepts and technologies are disclosed herein for spoofing bone conduction signals. According to one aspect, a device can compare a first unique body signature associated with a first user to a second unique body signature associated with a second user to determine a first unique effect of a first body of the first user on a signal and a second unique effect of a second body of the second user on the signal. The device can generate an authentication signal based upon the first unique effect and the second unique effect to include signal characteristics that, after propagating through the first body of the first user, are representative of the second unique body signature. The device can transmit the authentication signal through the first body of the first user to an authentication device that authenticates the first user on behalf of the second user.
US09582938B2
Aspects of the present invention include an apparatus comprising a recognition unit configured to recognize real object in an image. The apparatus may further comprise a determining unit configured to determine a stability indicator indicating a stability of the recognition, and a display control unit configured to modify a display of a virtual object according to the stability indicator.
US09582935B2
A tessellation method includes determining whether a previous tag the same as a current tag of a current patch is stored in a cache, and transmitting a previous tessellation pattern corresponding to the previous tag stored in the cache to a domain shader when a cache hit occurs. The method may further include, when a cache miss occurs, generating a current tessellation pattern corresponding to the current patch using a tessellator and transmitting the generated current tessellation pattern to the domain shader, and storing the generated current tessellation pattern in the cache.
US09582930B2
The present disclosure provides methods, devices, and computer-readable media for target acquisition in a three dimensional building display are described herein. One or more embodiments include extracting building information modeling semantic data of each of a number of modeled objects in a visual scene of a three dimensional building display, determining a semantic space for each of the number of modeled objects based, at least in part, on the building information modeling semantic data, adjusting a scale factor of the three dimensional building display based, at least in part, on the semantic space of each of the number of modeled objects, and acquiring a target of at least one of the modeled objects using the adjusted scale factor.
US09582928B2
An apparatus and method for restoring a hole generated in multi-view rendering are provided. A hole in an output view may be restored using temporally neighboring images.
US09582926B2
A method for Monte Carlo volume rendering in accordance with the present teachings includes: (a) tracing a plurality of light rays into a scene containing volumetric data, the light rays configured for simulating global illumination; (b) randomizing the scattering location and direction of the plurality of light rays through the volume, wherein a common sequence of random numbers is used in order for the scattering direction of each of the plurality of randomized scattered light rays to be substantially parallel; (c) computing at least one trilinearly interpolated and shaded sample along each of the plurality of randomized scattered light rays based on stored volumetric data, wherein at least a portion of the stored volumetric data used in at least a portion of the computing is configured for coherent access; and (d) rendering the volume with global illumination based on a plurality of iterations of the tracing, the randomizing, and the computing. Systems for Monte Carlo volume rendering are described.
US09582924B2
A mechanism is described for facilitating dynamic real-time volumetric rendering of graphics images on computing devices. A method of embodiments, as described herein, includes dividing a volume of a first image into a first volume and a second volume, where the first volume is associated with a fuzzy portion of the image, and the second volume is associated with a non-fuzzy portion of the image. The first volume may contain an array of metavoxels, where a metavoxel having an array of voxels. The method may further include applying particles to each metavoxel to detect a first set of voxels found inside one or more particles, and a second set of voxels found outside the particles, and generating, based on the first set of voxels, a second image from the first image. The method may further include to rendering the second image.
US09582922B2
A system, method, and computer program product are provided for producing images for a near-eye light field display. A ray defined by a pixel of a microdisplay and an optical apparatus of a near-eye light field display device is identified and the ray is intersected with a two-dimensional virtual display plane to generate map coordinates corresponding to the pixel. A color for the pixel is computed based on the map coordinates. The optical apparatus of the near-eye light field display device may, for example, be a microlens of a microlens array positioned between a viewer and an emissive microdisplay or a pinlight of a pinlight array positioned behind a transmissive microdisplay relative to the viewer.
US09582915B2
A method, apparatus and computer program product are provided for improved visualization of geo-located features. Geo-located features may be displayed with respect to a perspective point, such that the size of an indicator of a geo-located feature is representative of a distance of the feature from the perspective point. The positioning of the geo-located feature is indicative of the direction of the geo-located feature relative to the perspective point. Thus, compact visualization of the geo-located features may be provided. Animated transitions may be provided such that indicators gradually move as the perspective point moves, so that a user may maintain perspective.
US09582914B2
Provided is an image processing apparatus including: a cutout frame setting section configured to set a cutout frame for partially cutting out an editing target image as an editing target; an image editing section configured to edit, in response to an instruction from a user, an image in the cutout frame superimposed on the editing target image; and a cutout image generation section configured to cut out the image in the cutout frame from the editing target image and generate a cutout image.
US09582909B2
A measurement EIC for quantitative ions and a measurement EIC for ions to be confirmed in the vicinity of the retention time of a target compound are displayed in an overlapping manner in a chromatogram display area. In addition, a standard center line corresponding to a standard value of the confirmation ion ratio, which expresses the ratio of the intensity of the confirmation ions to the intensity of the quantitative ions in the target compound and an upper limit line and a lower limit line demonstrating the permissible range of the intensity of the confirmation ions are displayed in an overlapping manner on the EIC. An analyst determines whether a peak used for identification originates from the target compound by determining whether the top of an EIC peak of the confirmation ions falls between the upper limit line and the lower limit line.
US09582900B2
RGB image signals are inputted. B/G ratio is calculated based on B image signal and G image signal. G/R ratio is calculated based on the G image signal and R image signal. In a feature space formed by the B/G ratio and the G/R ratio, a first process is performed. In the first process, a difference between coordinates in a first observation area and coordinates in a second observation area is increased. The first observation area mostly contains coordinates corresponding to a portion (of an object) infected with H. pylori. The second observation area mostly contains coordinates corresponding to a portion (of the object) in which eradication of the H. pylori infection has been successful.
US09582899B2
Systems and methods providing digitally enhanced imaging for the prediction, application, and inspection of coatings. A digital imaging and processing device provides image acquisition, processing, and display of acquired digital imaging data to allow a user to discern variations, beyond that which can be discerned by observing a coating or a substrate with the naked eye. The digital imaging and processing device may also provide pre-coating and post-coating inspection capabilities as well as coating prediction capabilities.
US09582888B2
A structured light three-dimensional (3D) depth map based on content filtering is disclosed. In a particular embodiment, a method includes receiving, at a receiver device, image data that corresponds to a structured light image. The method further includes processing the image data to decode depth information based on a pattern of projected coded light. The depth information corresponds to a depth map. The method also includes performing one or more filtering operations on the image data. An output of the one or more filtering operations includes filtered image data. The method further includes performing a comparison of the depth information to the filtered image data and modifying the depth information based on the comparison to generate a modified depth map.
US09582887B2
In a method for determining field of view dependent depth map correction values for correction of a depth map of an image taken with a lens having a field of view the following is performed: obtaining (31) relative depth information for at least two different depths and at least two different predetermined locations of the field of view of the lens; receiving (32) an image; determining (33) a depth of the received image; and determining (34) on the basis of the determined depth of the received image at least one depth map correction value on the basis of the relative depth information.
US09582875B2
Conventionally, there was no method for automatically selecting the layers to be overlaid, so when the number of layers to be overlaid was large, there was a problem that much time was required for selecting the layers. It is an object of the present invention to provide a defect image analysis method capable of specifying patterns and layers in which a defect occurs by overlaying defect images to be analysis targets and design layout data, and a defect image analysis system capable of improving the efficiency to select the layers from the design layout data. The present invention is characterized in dividing analysis target images for each hierarchy corresponding to a manufacturing process and generating a plurality of layers; calculating a degree of matching between each of the layer division images and each design layer of the design layout data; and specifying a design layer with a highest degree of matching of the each design layer as a design layer corresponding to the layer division image.
US09582872B2
An optical defect detection method and a system thereof are disclosed. The detection method includes a process of detecting an image of an optical film by an optical detector. The image is converted into a clean detection image by conducting the following processes: uniforming the brightness, enhancing the contrast, filtering off the noise, smoothing the image and binarizing the image. A relative relation between a pixel and the surrounding pixels of the clean detection image is converted into a spatial relation sequence model. The spatial relation sequence model is compared to the different types of the defect sequence model, so that the defect type of the optical film is identified as a point defect, a lack of material defect or a ripple defect.
US09582867B2
Disclosed is an apparatus for assisting driving, including: a stereo camera module mounted in a vehicle, and configured to obtain a first image through a first camera and a second image through a second camera; and a processor configured to stereo-match the first image and the second image to obtain a dense disparity map, estimate a cubic b-spline curved line from the dense disparity map by using a coarse-to-fine method, and perform a road profile for two-dimensionally converting a 3D road, on which the vehicle travels, by using the cubic b-spline curved line.
US09582864B2
Described herein is a method for adjusting one or more images of a sample to correct geometric distortions and/or to properly align the one or more images using a pattern of dots, e.g., a quasiperiodic grid.
US09582863B2
Provided is an image processing apparatus including an image signal correction section that performs an image correction process. The image signal correction section performs a direction determination process of detecting a direction having a minimum pixel value gradient as a pixel value gradient direction in a pixel area including a target pixel; a defect detection process of calculating a Laplacian based on a pixel value of a reference pixel in a minimum gradient direction detected in the direction determination process with respect to the target pixel, and determining presence or absence of a defect of the target pixel; and a defect correction process of performing calculation of a corrected pixel value, which is obtained by applying the pixel value of the reference pixel in the direction detected in the direction determination process, with respect to a target pixel from which a defect has been detected in the defect detection process.
US09582859B2
A method for depth-image-based rendering, the method comprising the steps of: obtaining a first reference view; obtaining a depth map for the first reference view; obtaining a second reference view; obtaining a depth map for the second reference view; the method further comprising the steps of extracting noise present in the first and the second reference views; denoising the first and the second reference views and, based on the denoised first and second reference views, rendering an output view using depth-image-based rendering; adding the extracted noise to the output view.
US09582858B2
Anti-aliasing methods and systems may include logic to conduct a vertical blending weight determination based on horizontal pixel data associated with an image, and conduct a horizontal blending weight determination based on vertical pixel data associated with the image. Additionally, the logic may modify the image based on the vertical blending weight determination and the horizontal blending weight determination, wherein the vertical pixel data is excluded from the vertical blending weight determination, and the horizontal pixel data is excluded from the horizontal blending weight determination.
US09582854B2
According to an example, an original image is divided into image blocks according to a preset size, at least one pixel is overlapped between adjacent image blocks, a target image block is obtained after performing reduction processing for each of the image blocks according to a reduction factor, coordinates of the target image block are obtained according to the reduction factor and coordinates of the image block; and the target image blocks are combined according to the coordinates of the target image blocks.
US09582848B2
A set of tools, in the form of a software developers kit (SDK) for a graphics rendering system, is provided to improve overall graphics operations. In general, the tools are directed to analyzing a scene tree and optimizing its presentation to one or more graphics processing units (GPUs) so as to improve rendering operations. This overall goal is provided through a number of different capabilities, each of which is presented to software developers through a new applications programming interface (API).
US09582841B2
Locational tracking aids emergency management plans. Occupants of a building or campus are determined based on presence or detection of wireless devices. When an emergency occurs, the occupants may move to safety based on the current locations of their wireless devices.
US09582839B2
Methods, systems, and products notify of health events. Personal health information is stored in memory of a mobile communications device. A peer device is discovered through a wireless personal data network. The peer device is queried for anonymous health information. The anonymous health information is aggregated with the personal health information to produce aggregated health information. The aggregated health information is stored in the memory of the mobile communications device.
US09582828B2
Techniques are disclosed for methods and apparatuses for forming for determining when to perform maintenance events. The technique comprises determining a first cost of false positives and a second cost of missed true positives. A Receive Operating Characteristic (ROC) of a prediction model is determined for the occurrence of an event. A survival function and prediction horizon is generated from the prediction model for the occurrence of an event. The operational area on the ROC is determined based on the first costs and second costs. A threshold is determined from the ROC and is applied to the survival function and prediction horizon. A maintenance event is triggered based on the threshold.
US09582819B2
To optimize training data used by a predictive real-estate valuation model, a search space having multiple dimensions may be defined. Each search dimension corresponds to a range of candidate values for a search criterion for selecting subsets of sales-transaction records. The multiple dimensions include a temporal dimension and a geographic dimension. An accuracy-optimized subset of a multiplicity of sales-transaction records is identified by evaluating points that vary along each dimension within the multi-dimension search space. A statistical measure of model accuracy is used to evaluate each candidate point. The accuracy-optimized subset of the multiplicity of sales-transaction records is provided to a predictive model to generate an automated value prediction for a subject real-estate property as of an effective date.
US09582813B2
Delivery of a wrap package in response to the selection of an advertisement appearing in a web page, social media feed or in an email, text or other electronic message. In some embodiments, the advertisement may be a “cover” for the wrap package that contains an identifier associate with the wrap. When the cover is selected, the identifier is used to access and deliver the wrap package to the requesting device. In other embodiments, the advertisement may contain a link including the identifier that is then used to retrieve and deliver the wrap when the link is selected.
US09582812B2
A social networking system presents content items to users, who then provide feedback regarding pairs of content items. The feedback includes a selection of a content item of the pair of content items that was preferred by the user over the other content item. The social networking system uses this information to train a predictive model that scores content items based on quality. The content items may be advertisements. The social networking system uses the pair-wise comparisons of the advertisements to determine feedback coefficients in an advertising quality score prediction model using regression analysis of the pair-wise comparisons for each predictive factor in the model. In this way, the pair-wise comparisons are used to train the prediction model to understand which advertisements are more enjoyable than others. A feedback coefficient for each predictive factor may be computed based on the preferences received from the group of users.
US09582798B2
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for modulating card information between a card reader and a user device. One of the methods includes receiving, from a read head of the card reader, card information associated with a card. The card information is encoded in a first format to be sent to the user device at a first data rate. The card information is encoded in a second format to be sent to the user device at a second data rate lower than the first data rate. The card information is sent to the user device encoded in the first format and the second format.
US09582786B2
Machine learning models are used for ranking news feed stories presented to users of a social networking system. The social networking system divides its users into different sets, for example, based on demographic characteristics of the users and generates one model for each set of users. The models are periodically retrained. The news feed ranking model may rank news feeds for a user based on information describing other users connected to the user in the social networking system. Information describing other users connected to the user includes interactions of the other users with objects associated with news feed stories. These interactions include commenting on a news feed story, liking a news feed story, or retrieving information, for example, images, videos associated with a news feed story.
US09582782B2
Computer software is disclosed for discovering and representing a reporting model of an existing reporting environment. For each report in a plurality of reports, the software searches metadata of the report for descriptive information and dependencies on other reports. The software depicts, in a graphical representation, each report and relationships between the reports.
US09582776B2
This disclosure describes, generally, methods and systems for providing consolidated self service IT asset management. The method includes displaying, on a display device of an IT asset management system, an IT asset management user interface (UI), logging in, by an IT assets custodian, to the IT assets management UI, and displaying, at the IT assets management UI, an aggregated view of all IT assets assigned to the IT asset custodian. The aggregated view of the IT assets is generated from a plurality of IT asset assignment sources. The method further includes providing, the IT asset custodian with the ability to management the assigned IT assets and accurately account for the asset according to its actual use.
US09582766B2
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for clustering query refinements. One method includes building a representation of a graph for a first query, wherein the graph has a node for the first query, a node for each of a plurality of refinements for the first query, and a node for each document in the document sets of the refinements, and wherein the graph has edges from the first query node to each of the refinement nodes, edges from the first query to each document in the respective document set of the first query, edges from each refinement to each document in the respective document set of the refinement, and edges from each refinement to each co-occurring query of the refinement. The method further includes clustering the refinements into refinement clusters by partitioning the refinement nodes in the graph into proper subsets.
US09582763B2
An efficient fact checking system analyzes and determines the factual accuracy of information and/or characterizes the information by comparing the information with source information. The efficient fact checking system automatically monitors information, processes the information, fact checks the information efficiently and/or provides a status of the information.
US09582758B2
A data classification method which classifies a plurality of data into a plurality of classification items based on a feature quantity included in the data, the method includes calculating, by a processor, an appearance probabilities in which training data including the feature quantity appears in the classification items in a distribution of the data, generating, by the processor, a rule having the feature quantity and a weighting of the feature quantity based on a plurality of the training data having the feature quantity based on the appearance probabilities; and classifying, by the processor, the plurality of data according to the rule.
US09582755B2
Methods, systems, computer-readable media, and apparatuses for inferring context are provided. In one potential implementation, first context information associated with a first duration is identified, second context information is accessed to determine a context segmentation boundary; and the first context information and the second context information is then aggregated to generate an inferred segmented aggregated context. In a further implementation, the first context information is used to average inferred contexts, and the context segmentation boundary is used to reset a start time for averaging the first context information.
US09582750B2
An RFID device includes a conductive sheet defining at least first and second portions, with an intermediate portion joining the other portions. One or more RFID chips electrically coupled to the portions, such as one or both of the first and second portions of the conductive sheet and to the intermediate portion. The first portion of the conductive sheet defines a multi-turn high frequency antenna having one or more disruptions in the conductive sheet positioned between and/or defining adjacent turns of the multi-turn antenna. The second portion of the conductive sheet defines a first radiating arm of an ultra high frequency antenna. The disruptions direct a high frequency current around the turns of the multi-turn high frequency antenna, while allowing an ultra high frequency current to flow across the disruptions, resulting in the first portion of the conductive sheet defining a second radiating arm of the ultra high frequency antenna.
US09582748B2
A wearable device system includes one or more sensors coupled to a wearable device structure that includes first and second outer surfaces, an interior, a first end and a second end. The wearable device structure has a unique user ID. The sensors acquiring user information selected from of at least one of, a user's activities, behaviors, habit information, health parameters, medical monitoring and user monitoring. The wearable device has a power source coupled to a charging device of the wearable device. A base station is configured to be coupled to the wearable device and has a corresponding charging device for charging or recharging the power source of the wearable device.
US09582746B2
Various embodiments of RFID switch devices are disclosed herein. Such RFID switch devices advantageously enable manual activation/deactivation of the RF module. The RFID switch device may include a RF module with an integrated circuit adapted to ohmically connect to a substantially coplanar conductive trace pattern, as well as booster antenna for extending the operational range of the RFID device. The operational range of the RFID switch device may be extended when a region of the booster antenna overlaps a region of the conductive trace pattern on the RF module via inductive or capacitive coupling. The RFID switch device may further include a visual indicator displaying a first color if the RFID switch device is in an active state and/or a second color if the RFID switch device is in an inactive state.
US09582745B2
A wireless communication circuit performs a wireless communication with a transmitter-receiver via an antenna. Power to the wireless communication circuit is turned on by electromagnetic waves transmitted from the transmitter-receiver. In the wireless communication circuit, a circuit includes a capacitor for storing electric charge at the time of the power being on, and is configured to pass discharging current based on the electric charge stored in the capacitor along a current path including the antenna at the time of the power being off, a monitoring circuit is configured to be operated by electric power based on the electric charge at the time of the power being off and to determine the presence or absence of degradation on the basis of potential of a node on the current path, and a storage circuit is configured to store the result of a determination by the monitoring circuit.
US09582742B2
A printing device for implementing printing on a medium includes a detection unit and a control unit. The detection unit is configured to detect loading of the medium into the printing device and withdrawal of the medium from the printing device. The control unit is configured to indicate contents displayed on a display screen. The control unit is further configured to generate a first signal of displaying a first screen on the display screen when the detection unit detects that the medium has been withdrawn from the printing device, and generate a second signal of displaying a second screen different from the first screen on the display screen when the detection unit detects that the medium has been loaded into the printing device.
US09582737B2
Various arrangements for recognizing a gesture are presented. User input may be received that causes a gesture classification context to be applied from a plurality of gesture classification contexts. This gesture classification context may be applied, such as to a gesture analysis engine. After applying the gesture classification context, data indicative of a gesture performed by a user may be received. The gesture may be identified in accordance with the applied gesture classification context.
US09582734B2
A key identification system is provided. The key identification system comprises a sensing device configured to extract bitting information from a master key, and a logic configured to analyze the image. The sensing device may be configured to capture information about the bittings of the master key, such as an image of the bittings. The logic analyzes information about the bittings of the master key and compares it with bitting characteristics of known key blanks to determine the likelihood of a match between the master key and a known key blank.
US09582733B2
The invention provides an image processing device, an image processing method, and an image processing program capable of maintaining estimation accuracy even when an input image of a processing target includes a plurality of shape elements. The image processing device includes: a recognizing unit that recognizes one or more shape elements which are included in the input image from a feature amount included in the input image; a selecting unit that selects a desired shape element out of the recognized one or more shape elements; and an estimating unit that estimates a target shape element from information of a region corresponding to the selected shape element.
US09582730B2
A method and system are provided. The method includes storing a set of references images without rain and spanning a plurality of different light conditions. The method further includes capturing, using a camera, an image of a scene with rain. The method also includes selecting a reference image from the set of reference images based on the light condition of the captured image. The method additionally includes performing an arithmetic subtraction image processing operation between the captured image and the reference image to generate a subtraction image. The method further includes estimating an amount of rain in the subtraction image based on previously calibrated values.
US09582729B2
A detection apparatus for detecting the position of a boundary between a first part and a second part of a subject, includes a pixel extraction unit for extracting a plurality of candidate pixels acting as candidates for a pixel situated on the boundary on the basis of image data of a first section crossing the first part and the second part, and a pixel specification unit for specifying the pixel situated on the boundary from within the plurality of candidate pixels by using an identifier which has been prepared by using an algorithm of machine learning.
US09582708B2
A display device which accurately detects and corrects only a facial region contained in an image and thereby prevents an error in which a background or neighboring object having a similar color to a skin color is corrected together with the facial region, and a method of controlling the same are provided. The display device includes an image processor configured to detect a face candidate region from an input image, based on information associated with at least one face color region, to detect a face region by applying a face detection algorithm to the detected face candidate region and to perform skin color correction on the detected face region, and a display configured to display the corrected input content.
US09582707B2
A three-dimensional pose of the head of a subject is determined based on depth data captured in multiple images. The multiple images of the head are captured, e.g., by an RGBD camera. A rotation matrix and translation vector of the pose of the head relative to a reference pose is determined using the depth data. For example, arbitrary feature points on the head may be extracted in each of the multiple images and provided along with corresponding depth data to an Extended Kalman filter with states including a rotation matrix and a translation vector associated with the reference pose for the head and a current orientation and a current position. The three-dimensional pose of the head with respect to the reference pose is then determined based on the rotation matrix and the translation vector.
US09582704B2
A fingerprint sensing device comprising sensing circuitry comprising a plurality of sensing elements, each sensing element comprising a sensing structure arranged in a sensing plane and facing a surface of the capacitive fingerprint sensing device, each of the sensing elements being configured to provide a signal indicative of an electromagnetic coupling between the sensing structure and a finger placed on the surface of the fingerprint sensing device; and a plurality of connection pads electrically connected to the sensing circuitry for providing an electrical connection between the sensing circuitry and readout circuitry, wherein each of the connection pads is separately recessed in relation to the sensing plane such that each connection pad has a floor in a floor plane, and wherein each connection pad is separated from an adjacent connection pad through a portion of the sensing device being elevated in relation to the floor plane.
US09582702B2
Embodiments of the present invention generally relate to data processing, and further the embodiments of the invention relate to a method of processing a visible coding sequence and a system thereof, a method of playing a visible coding sequence and a system thereof. The present invention creatively proposes a scheme of determining sampling rate with synchronized frames to realize effective processing of a visible coding sequence. The scheme of processing a visible coding sequence according to the present invention is helpful for visible coding synchronization on the capturing side, enabling the capturing side to determine appropriate sampling rate and sampling timing, and thus effectively acquire the visible coding sequence, which may not only reduce resource waste, but also acquire a complete visible coding sequence.
US09582701B2
A dot pattern including a block defined as a rectangular area of a square or a rectangle of a medium face, such as printed matter. A straight line in a vertical direction and a horizontal direction configuring a frame of the block each are defined as a standard grid line. Virtual reference grid points are provided at predetermined intervals on the reference grid line. Reference grid point dots are placed on respective virtual reference grid points. Straight lines that connect the virtual reference grid points to each other and are parallel to the reference grid lines are defined as grid lines. A point of intersection of grid lines is defined as a virtual grid point. A dot pattern is generated by arranging one or a plurality of information dots, each of which has a distance and a direction around the virtual grid point.
US09582700B2
A method of verifying the authenticity of an identification card, including capturing, with a point-of-sale scanner, a first image of the identification card, configuring an ultraviolet filter mounted within the point-of-sale scanner to allow the passage of ultraviolet light within, illuminating the identification card with ultraviolet light, capturing, with the point-of-sale scanner, a second image of the identification card, and determining if the identification card is authentic by analyzing the first and second images.
US09582696B2
There is described an imaging apparatus having an imaging assembly that includes an image sensor. The imaging apparatus can capture a frame of image data having image data corresponding to a first set of pixels of the image sensor. The imaging apparatus can capture a frame or image data having image data corresponding to a second set of pixels of the image sensor.
US09582694B2
An antenna (18), in particular a patch antenna for an RFID reading apparatus (10), having a circuit board (24) which has at least one slot (26) and a contact (28) at the slot (26) for feeding and/or picking up an electromagnetic signal. In this respect, the slot (26) is folded into itself and so forms a two-dimensional pattern on the circuit board (24).
US09582692B2
A radio-frequency identification (RFID) reader is provided The RFID reader includes a transmitter/receiver module configured to transmit a radio signal at a plurality of different power levels, and a control module coupled to the transmitter/receiver module and configured to control the power level at which the radio signal is transmitted based on a number of RFID tags detected when transmitting the radio signal at an initial power level.
US09582689B2
Systems and methods are provided for enabling a portable electronic device to retrieve information about an object when the object's symbology, e.g., a barcode, is detected. According to one embodiment a method is providing in which symbology associated with an object is detected and decoded to obtain a decode string. The decode string is sent to one or more visual detection applications for processing, wherein the one or more visual detection applications reside on the portable electronic device, and receiving a first amount of information about the object from the one or more visual detection applications. The method also includes sending the decode string to a remote server for processing and receiving a second amount of information about the object from the remote server. The first amount of information is combined with the second amount of information to obtain cumulative information which is displayed on the portable electronic device.
US09582684B2
A method for configuring an application for an end device having a predefined end-device configuration with a predefined security level. A query about the predefined end-device configuration is directed by means of the application to a central place in which a multiplicity of security levels of end-device configurations have respective application configurations associated therewith. In response to the query, the central place ascertains the predefined security level of the predefined end-device configuration from the multiplicity of security levels, and outputs it to the application together with the associated application configuration. In dependence on the output security level, one or several functions of the application are configured by means of the application on the basis of the output application configuration for the end device.
US09582675B2
A method for loading a program, contained in at least a first memory, into a second memory accessible by an execution unit, in which the program is in a cyphered form in the first memory, a circuit for controlling the access to the second memory is configured from program initialization data, instructions of the program, and at least initialization data being decyphered to be transferred into the second memory after configuration of the circuit.
US09582668B2
Quantifying the risks of applications (“apps”) for mobile devices is disclosed. In some embodiments, quantifying the risks of apps for mobile devices includes receiving an application for a mobile device; performing an automated analysis of the application based on a risk profile; and generating a risk score based on the automated analysis of the application based on the risk profile.
US09582663B2
In one embodiment, a processor includes at least one execution unit and Return Oriented Programming (ROP) detection logic. The ROP detection logic may determine a ROP metric based on a plurality of control transfer events. The ROP detection logic may also determine whether the ROP metric exceeds a threshold. The ROP detection logic may also, in response to a determination that the ROP metric exceeds the threshold, provide a ROP attack notification.
US09582662B1
Systems and techniques are provided for creating sensor based rules for detecting and responding to malicious activity. Evidence corresponding to a malicious activity is received. The evidence corresponding to malicious activity is analyzed. Indicators are identified from the evidence. The indicators are extracted from the evidence. It is determined that an action to mitigate or detect a threat needs to be taken based on the indicators and evidence. A sensor to employ the prescribed action is identified. Whether a sensor based rule meets a threshold requirement is validated. A configuration file used to task the sensor based rule to the identified sensor is created. The number of sensor based rule triggers is tracked.
US09582654B2
A mobile device includes a housing, a sensor and a deformation detecting IC which detect deformation of the housing, a memory which stores a pattern database in which patterns of the deformation of the housing are registered in advance, and an authentication unit which performs authentication based on whether or not the deformation of the housing detected by the sensor and the deformation detecting IC corresponds to a pattern registered in the pattern database.
US09582643B2
Systems, methods, and computer-readable medium are provided for managing user information. For example, data of a particular data type may be received from a plurality of sources. In some examples, the data may include at least respective time stamps. The received data may be aggregated to form a data record for a period of time based at least in part on the respective time stamps. Additionally, in some cases, the data record may be provided to at least one application configured to present a user interface representing the aggregated data of the plurality of sources.
US09582641B2
A system and method distributing healthcare database access is disclosed. The system and method interpose a data mapping server (DMS) between a data request user server (DRS) and data service user server (DSS) to manage data transfers between the DSS and the DRS such that disparate database characteristics of the DRS/DSS are accommodated in real-time and permit asynchronous healthcare activity to be triggered. The DMS operates with a data access matrix (DAM) having each referenced DRS/DSS intersection pair associated with read/write control processes (RWP) that include read data (RDD) and write data (WRD) processes to permit data access across the disparate DRS/DSS database boundaries. The DAM may have multiple dimensions to accommodate asynchronously activated process threads within an overall patient healthcare plan (PHP) that operate to trigger healthcare provider alarms and other activity associated with the transfer/update of data between the DSS and the DRS.
US09582631B2
A method for design template pattern optimization, comprises receiving a design for a fin field effect transistor (FinFET) device, wherein the design includes a configuration of fins, creating a design template pattern for the design for use in connection with directed self-assembly (DSA) patterning using graphoepitaxy, and optimizing the design template pattern to minimize pattern density gradients, wherein the design template pattern includes a plurality of guiding lines for guiding a block-copolymer deposited during the DSA patterning and the optimizing comprises altering the guiding lines.
US09582622B1
A linear circuit simulator can be supplied with a linear power distribution model of an integrated circuit (IC) and two sets of voltage regulator equivalent resistances. The linear circuit simulator can then be used to calculate two voltages, at a sense point of the IC, corresponding to the two sets of voltage regulator equivalent resistances. The two sets of voltage regulator equivalent resistances and the two voltages at the IC sense point can be used to interpolate a slope of a resistance versus voltage curve of the linear power distribution model. The slope can be used to calculate an updated set of voltage regulator equivalent resistances, which can be used by the linear circuit simulator to calculate a set of performance metrics and an updated voltage at the sense point of the IC.
US09582619B1
An approach for simulating a block of a circuit design includes using a row-matching table and a port state vector. The row-matching table includes a plurality of rows, and each row includes encoded input match patterns corresponding to a plurality of input ports of the block and an associated output value. The port state vector includes input state codes associated with the input ports. In response to an update of an input signal value at one of the input ports during simulation, the input state code associated with the one input port is updated according to the updated input signal value. A bit-to-bit pattern match is performed for each bit in the port state vector to a corresponding bit in the encoded input match patterns in one or more rows of the row-matching table. The associated output value of a matching row is selected as a new output value.
US09582613B2
Systems and methods for massive model visualization in product data management (PDM) systems. A method includes storing a hierarchical product data structure by a product data management (PDM) system, including a plurality of occurrence nodes and component nodes. The method includes receiving a query that references an occurrence node and at least one cell index value and determining a query result corresponding to the query. The query result identifies at least one occurrence node that corresponds to the cell index value. The method includes forming a query result chain corresponding to the query result, the query result chain filtered by a structural criterion, and applying a configuration rule to the filtered query result chain to identify child nodes of the filtered query result chain that conform to the configuration rule, and thereby producing a configured spatial retrieval result.
US09582608B2
Methods, systems, and computer-readable media related to a technique for combining two or more aspects of predictive information for auto-completion of user input, in particular, user commands directed to an intelligent digital assistant. Specifically, predictive information based on (1) usage frequency, (2) usage recency, and (3) semantic information encapsulated in an ontology (e.g., a network of domains) implemented by the digital assistant, are integrated in a balanced and sensible way within a unified framework, such that a consistent ranking of all completion candidates across all domains may be achieved. Auto-completions are selected and presented based on the unified ranking of all completion candidates.
US09582577B2
A video is divided into portions and has objects. Each object appears in one or more portions. A graphical diagram is generated and displayed that has graphical elements corresponding to the objects. Each graphical element has a size corresponding to a number and/or size of the portions in which the object to which the graphical element corresponds appears. The graphical elements have locations within the graphical diagram in correspondence with relationships of appearance of the objects within the portions. Selection of a point or area within the graphical diagram is received. Which of the graphical elements include the point or area are determined as one or more selected graphical elements corresponding to one or more selected objects. Which of the portions include all the selected objects are determined and output as one or more selected portions.
US09582572B2
A system, devices, and methods for providing a personalized search library based on continual concept correlation include a client computing device and a personalized content server. Content events representing content accessed or manipulated by a user of the client computing device are continually generated. Content associated with the content events is continually parsed and analyzed to extract main concepts. The extracted concepts are correlated and weighted into a concept model, based on the order of the content events. The concept model parallels the structure of the user's memory. Data sources are continually searched for content relevant to a current context of the concept model. Relevant content is indexed according to the concept model. The relevant content may be made available to the user upon request or proactively. Relevant content may be cached for future use by the user. Other embodiments are described and claimed.
US09582561B2
Data synchronization techniques are provided that effectively isolate data transfer over the network from actual interpretation of data. The data synchronization techniques include a protocol designed to work based on a “size” (amount) of data transferred over the network, irrespective of the content represented by the data that is transferred. The size itself may be determined, for example, by the client, backend system, an agreed-upon configuration that is maintained for a predetermined period of time, etc. In certain embodiments, a client transmits a request to the server that indicates a “requested payload size.” Using the requested payload size, the server generates a response (i.e., one or more messages) that provides the client with data, referred to herein as synchronization data, for storage at the client device.
US09582558B2
Systems, methods and computer program products for DDL replication are described herein. An embodiment includes a replication agent to instantiate one or more DDL triggers in a primary database and a replication server to provide DDL command text to a replicate database based on said DDL triggers. The replication agent uses the DDL trigger(s) to capture one or more DDL events and retrieve a transaction log associated with the DDL events. The replication agent processes the transaction log to obtain DDL command text. The DDL command text is then sent to a replicate database by the replication server where it is executed in an appropriate user context. In this way, DDL commands in may be replicated using DDL trigger(s) and session context switching.
US09582551B2
The system provides a method and apparatus for sorting and displaying collections of communications. These communications can be a single type or multiple types of data and may come from email systems, bulletin boards, text messages, Facebook and Twitter postings and comments, financial transactions, travel itineraries or any other type of communications. The communications represented by the system can be electronic or physical as desired. The system can also present forwarded, copied, replied, or other types of communications. In one embodiment, the system provides a Universe View of a set of communications. The Universe View, in one embodiment, is a three dimensional representation of a plurality of cubes. Each cube represents a subset of a collection of communications. Each cube can be color coded or shaded to represent a dominant theme of the contents of the communications represented by the cube.
US09582544B2
Search query expansion tool is provided. A processor generates a collection of events for a search result, wherein events included in the collection of events are within a temporal proximity to the search result. A processor determines a content of the collection of events. A processor determines a search suggestion based, at least in part, on the content of the collection of events.
US09582538B1
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for distributing content are disclosed. In one aspect, a method includes accessing data specifying a plurality of search queries. Content distribution campaigns (“campaigns”) in which distribution of at least one content item is conditioned on a distribution parameter matching one of the search queries are identified. Two or more similar campaigns are identified, and a search query that matches a distribution parameter in at least one of the similar campaigns is identified as a candidate content distribution parameter. A trend score for the candidate content distribution parameter is determined based on a change in a submission rate of search queries that match the candidate distribution parameter. Suggestion data suggesting the candidate content distribution parameter as an additional content distribution parameter for at least one of the similar campaigns is provided based on the trend score.
US09582533B2
An electronic learning device (1) disclosed herein includes: a search process section (21) for searching dictionary data (31) by a keyword inputted during reproduction of moving image data (30) and displaying the result of the search; and a historical data generating section (22) for generating historical data (32) including, in association with one another, (i) a content reproduction time point at which the search process section (21) ran a search, (ii) the keyword that the search process section (21) used in the search, and (iii) a dictionary used for the search based on the keyword.
US09582515B1
The subject matter of this specification can be embodied in, among other things, a method that includes identifying a search query that was submitted through a map interface, determining that a number of specific query indicators that are included in the search query meets a pre-specified number of specific query indicators, wherein the specific query indicators are selected, at least in part, from a set consisting of commas and capital letters, classifying, in response to the determination, the search query as a specific place query, and providing, based on the determination, content that excludes sponsored content in response to the search query.
US09582511B2
Various embodiments are directed to maintaining versions of data within a solid state memory. At least one request to write at least one dataset to a logical page of a solid state memory is received from a file system. At least one physical page in a data block of the solid state memory associated with the logical page is identified. A processor stores the dataset in the at least one physical page. At least one data versioning tag is associated with the at least one dataset in a data structure associated with the logical page. The data versioning tag identifies the at least one dataset as a given version of the logical page. The at least one dataset is maintained as accessible from the at least one physical page irrespective of subsequent write operations to the logical page in response to associating the at least one data versioning tag.
US09582508B2
Methods and apparatus provide for a Transformer that detects a selection to playback content and downloads a file in response to detecting the selection to playback content. The file is in a first format and includes a first reference to a location of secondary content that is in a first format that is incompatible with the first format of the file. The Transformer transforms the secondary content to a format compatible with the first format of the file and creates a second reference to the location of the transformed secondary content that is in the format compatible with the first format of the file.
US09582506B2
Technologies pertaining to conversion of declarative statements written in a domain-specific language to data that is playable by a rich interactive narrative (RIN) player are described herein. A web browser can be configured to support a RIN player. Source code of a web page includes an indication that the RIN player is to be invoked, declarative statements written in the domain-specific language, and data that identifies a network-accessible location of a converter. The converter is configured to convert declarative statements in the domain-specific language to RIN data that is playable by the RIN player. Thus, a developer of a web page can utilize declarative statements in the domain-specific language to cause a RIN to be included in a web page.
US09582501B1
Techniques for use in connection with generating text, the techniques comprise: obtaining a plurality of items of content and associated metadata; and generating a document plan comprising a plurality of rhetorical relations among items of content in the plurality of items of content, the plurality of rhetorical relations comprising a first set of one or more rhetorical relations and a second set of one or more rhetorical relations different from the first set, the generating comprising: obtaining a schema specifying the first set of one or more rhetorical relations; and identifying the second set of rhetorical relations based, at least in part, on the associated metadata, wherein the second set of rhetorical relations is not in the schema.
US09582498B2
A set of one or more terms can be derived from the voiced user input. It can be determined that the set of one or more terms corresponds to a specific digital document in a computer system, and that the set of one or more terms corresponds to at least one computer-executable command. The determination that the set of one or more terms corresponds to the at least one command can include analyzing the set of one or more terms using a document-specific natural language translation data structure. The translation data structure can be a computer-readable data structure that is identified in the computer system with the specific digital document in the computer system. It can be determined that the set of one or more terms corresponds to an element in the document, and the at least one command can be executed on the element in the document.
US09582496B2
Embodiments relate to facilitating a meeting. A method for facilitating a meeting of a group of participants is provided. The method generates a graph of words from speeches of the participants as the words are received from the participants. The method partitions the group of participants into a plurality of subgroups of participants. The method performs a graphical text analysis on the graph to identify a cognitive state for each participant and a cognitive state for each subgroup of participants. The method informs at least one of the participants about the identified cognitive state of a participant or a subgroup of participants.
US09582495B2
A semantic extraction system leverages domain expert knowledge, to impart meaningful business information aiding ordinary knowledge consumers in understanding large/complex data volumes and models thereof. Certain embodiments may comprise a layered structure comprising an information uplifting layer, a semantic processing layer, and a visual representation layer. Referencing domain knowledge model(s) created by human domain experts, the information uplifting layer extracts and maintains meaningful information in a semantic structure. The semantic processing layer then processes this extracted information for various different business analysis purposes. Finally, the visual representation layer allows the analyzed and aggregated information to be arranged and visualized via a range of interactive tools. The overall layered structure is powered by the domain knowledge models, which capture specialized knowledge from experts in different domains. Such domains can include industry and enterprise characteristics, data visualization, and model structure and function.
US09582489B2
This illustrative embodiments provide a mechanism for correcting a phonetically sourced spelling mistake. The mechanism receives a language text string comprising at least one spelling mistake word and transcribes the at least one spelling mistake word into a phonetic form of the spelling mistake word using a phonetic dictionary. The mechanism locates a correctly spelled phonetic form from a phonetic form dictionary having shortest edit distance between characters of the correctly spelled phonetic form word and the phonetic transcription whereby the phonetic form dictionary comprises correctly spelled words and associated phonetic forms of the correctly spelled words. The mechanism substitutes the correctly spelled word for the spelling mistake word in the text string.
US09582487B2
A predicate template collector allowing efficient and automatic recognition of predicate templates is adapted to include: a noun pair collector 94 and a noun pair polarity determiner 98 for collecting noun pairs co-occurring with predicate template pairs and determining polarity of relation between nouns, using conjunctions and seed templates; a template pair collector 100, collecting template pairs co-occurring with noun pairs and determining, based on the relation of noun pairs co-occurring with the predicate template pairs and the conjunctions between predicate templates pairs, whether the polarity of excitatory class of predicate template pair is the same or not; a template network builder 106 building a template network connecting predicate templates based on the predicate template pairs and match/mismatch of excitatory class thereof; and a template excitation value calculator 112 calculating excitation value to be assigned to each node, using the excitation value of seed templates and the relation between each of the nodes in the network.
US09582484B2
A system for facilitating filling at least one unfilled form including at least one data field is disclosed. The system includes a display module configured to display the at least one unfilled form. Further, the system includes a scanning module configured to scan at least one supporting document, a classifier module configured to classify the at least one supporting document into at least one document class, an extracting module configured to extract the information from the at least one supporting document based on the at least one document class, a questionnaire module configured to provide an adaptive questionnaire to obtain additional information, and a form-filling module configured to fill out the at least one unfilled form to obtain at least one filled form. Finally, the system includes a communication module configured to send the at least one filled form over a communication network.
US09582480B1
An indication to render a webpage is received. The webpage includes two or more frames and the two or more frames are rendered in a first order. A second order from a user is received. The webpage is rendered. The two or more frames of the webpage are rendered in the second order.
US09582474B2
A method, apparatus, and computer program product for performing an FFT computation. The method includes: providing first and second input data elements in multiple memory areas of a memory unit; in each of a number of consecutive computation stages, performing multiple butterfly operations based on a first and second input data element to obtain two output data elements, wherein first and second input data elements for a plurality of multiple butterfly operations are simultaneously retrieved from predetermined memory locations of a first and second of memory areas; for each stage, storing two output data elements in the memory unit as input data elements for a next stage according to a mapping scheme configured to store output data elements at memory locations in first and second memory areas so that they are simultaneously retrievable as input data elements for a plurality of butterfly operations of subsequent computation stage.
US09582470B2
According to an embodiment, there is provided a plurality of spiral antenna elements that are generated using algorithms taught herein that can be implemented in hardware or software. Embodiments utilize symmetric combinations of 2 or 3 such spiral elements on a substrate or within computer memory to create an array. Each of the antenna elements is in the form of expanding spiral (non-logarithmically expanding) and contains at least six turns. Among the suitable spirals are Fermat, and/or Cornu (Euler) and/or Archimedes and/or other non-logarithmically expanding spirals in any combination. As an article of manufacture, the antenna array may be incorporated into a chip, such as might be found in a cell phone or other CPU based product, or printed or otherwise mounted on an article of clothing, for example.
US09582463B2
Methods and apparatus to provide heterogeneous I/O (Input/Output) using RDMA (Remote Direct Memory Access) and/or Active Message are described. In an embodiment, information is exchanged between an embedded system and a storage device via a source device. The embedded system and the storage device exchange information over a first link and a second link instead of a third link in response to a transfer rate of the first link (coupled between the embedded system and the source device) being faster than a transfer rate of the second link (coupled between the source device and the storage device). The third link is capable to directly couple the embedded system and the storage device. Other embodiments are also disclosed and claimed.
US09582461B2
In an example, an electronic device is configured to: associate a set of member actions of an electronic social networking system with an account corresponding to a member of the electronic social networking system; wherein a subset of the associated set of member actions includes member actions to be unlocked; increment a score for the account in response to the member a member-to-member interaction through the electronic social networking system; wherein the electronic social networking system comprises a social networking resource that is configured to provide real time interaction between the member and other members; gradually unlock, for the account, the member actions of the subset based on the score, wherein a first member action of the subset is unlocked in response to the score reaching a first threshold and a second different member action of the subset is unlocked in response to the score reaching a second different threshold.
US09582457B2
System, methods and apparatus are described that include a serial bus, including a serial bus used for Inter-Integrated Circuit (I2C) and/or camera control interface (CCI) operations. The bus has a first line and a second line, a first set of devices coupled to the bus and a second set of devices coupled to the bus. A method of operating the bus includes configuring the first set of devices to use the first line for data transmissions and use the second line for a first clock signal in a first mode of operation, and configuring the second set of devices to use both the first line and the second line for data transmissions while embedding a second clock signal within symbol transitions of the data transmissions in a second mode of operation.
US09582455B2
A simplified host accesses SATA and SAS storage media devices by abstracting the SATA and SAS protocols with one full duplex protocol that supports full command queuing to each storage media device, whether SATA or SAS, where the abstraction protocol is performance-centric and supports common high-level read and write access to a pool of storage media devices, each of which may have a SATA or SAS interface. The abstraction protocol is link-agnostic and may be carried via a multiplicity of direct attach or networked interfaces, including but not limited to PCIe, Ethernet (e.g., 1 GbE, 10 GbE, 40 GbE, or 100 GbE), Infiniband, ThunderBolt, Firewire, USB, and/or custom interfaces. The abstraction protocol also supports communicating with port expanders and port multipliers.
US09582454B2
Described is a reconfigurable transmitter which includes: a first pad; a second pad; a first single-ended driver coupled to the first pad; a second single-ended driver to the second pad; a differential driver coupled to the first and second pads; and a logic unit to enable of the first and second single-ended drivers, or to enable the differential driver.
US09582451B2
In accordance with an embodiment, a receiver includes a first state machine configured to be coupled to a bus. The first state machine is configured to determine that a first output signal is a first symbol if a first received bus signal transitions from a first bus state to a second bus state and stays in the second bus state for less than a first predetermined period of time, and the first output signal is a second symbol if the first received bus signal transitions from the first bus state to the second bus state and stays in the second bus state for at least the first predetermined period of time.
US09582445B1
Systems and methods are presented for detecting, by a universal serial bus (USB) drive operatively coupled with a computing device, power from the computing device, and determining, by the USB drive, that drivers associated with the USB drive have been installed on the computing device. The systems and methods may determine that drivers associated with the USB drive have been installed by sending, to the computing device, a digital signal indicating a predetermined keystroke until the USB drive receives a response from the computing device, and receiving, from the computing device, a feedback response to the digital signal indicating the predetermined keystroke has been received. The systems and methods further executing, by the USB drive, a macro to download a payload to the computing device from a server computer, causing by the USB drive, the payload to execute on the computing device, and causing, by the USB drive, the downloaded payload to be deleted from the computing device.
US09582443B1
The present disclosure describes a serial control channel processor. In some aspects, a time-based instruction corresponding to a command is executed and a signaling event based on the time-based instruction is generated at a communication port. In other aspects a signal containing data is received at a communication port and a time-based instruction is executed to read data of the received signal.
US09582440B2
An apparatus includes multiple data sources and arbitration circuitry. The data sources are configured to send to a common destination data items and respective arbitration requests, such that the data items are sent to the destination regardless of receiving any indication that the data items were served to the destination in response to the respective arbitration requests. The arbitration circuitry is configured to receive and buffer the data items, to perform arbitration on the buffered data items responsively to the arbitration requests, and to serve the buffered data items to the destination in accordance with the arbitration.
US09582434B2
A disclosed method includes obtaining a physical address corresponding to a virtual address responsive to detecting a virtual address associated with a memory access instruction and, responsive to identifying a memory page associated with the physical address as a sensitive memory page, evaluating sensitive access information associated with the memory page. If the sensitive access information satisfies a sensitive access criteria, invoking a sensitive access handler to control execution of the memory access instruction.
US09582427B2
A method, system and memory controller for implementing memory hierarchy placement decisions in a memory system including direct routing of arriving data into a main memory system and selective injection of the data or computed results into a processor cache in a computer system. A memory controller, or a processing element in a memory system, selectively drives placement of data into other levels of the memory hierarchy. The decision to inject into the hierarchy can be triggered by the arrival of data from an input output (IO) device, from computation, or from a directive of an in-memory processing element.
US09582426B2
A computing element, system, and method for implementing control structures for a compressed cache in hardware. Embodiments provide a first engine configured to allocate and deallocate virtual memory pages and physical memory pages from pools of available pages to store received data to the compressed cache, a second engine configured to compress received data and store the compressed data. Embodiments also provide for embedding data within the virtual and physical memory pages to indicate page size, type, and data compression.
US09582423B2
Embodiments relate to counter-based wide fetch management. An aspect includes assigning a counter to a first memory region in a main memory that is allocated to a first application that is executed by a processor of a computer. Another aspect includes maintaining, by the counter, a count of a number of times adjacent cache lines in the cache memory that correspond to the first memory region are touched by the processor. Another aspect includes determining an update to a data fetch width indicator corresponding to the first memory region based on the counter. Another aspect includes sending a hardware notification from a counter management module to supervisory software of the computer of the update to the data fetch width indicator. Yet another aspect includes updating, by the supervisory software, the data fetch width indicator of the first memory region in the main memory based on the hardware notification.
US09582422B2
Two techniques address bottlenecking in processors. The first is indirect prefetching. The technique can be especially useful for graph analytics and sparse matrix applications. For graph analytics and sparse matrix applications, the addresses of most random memory accesses come from an index array B which is sequentially scanned by an application. The random accesses are actually indirect accesses in the form A[B[i]]. A hardware component is introduced to detect this pattern. The hardware can then read B a certain distance ahead, and prefetch the corresponding element in A. For example, if the “prefetch distance” is k, when B[i] is accessed, the hardware reads B[i+k], and then A[B[i+k]. For partial cacheline accessing, the indirect accesses are usually accessing random memory locations and only accessing a small portion of a cacheline. Instead of loading the whole cacheline into L1 cache, the second technique only loads a part of the cacheline.
US09582416B2
A data erasing method for a rewritable non-volatile memory module is provided. The method includes receiving a predetermined command for performing on a first logical sub-unit from a host system; marking a first physical programming unit mapped to the first logical sub-unit as being in an invalid data status and recording a mark for a first physical erasing unit that the first physical programming unit belongs to, in response to the predetermined command. The method further includes selecting the first physical erasing unit according to the mark, copying valid data in the first physical erasing unit to a second physical erasing unit gotten from a spare area of the rewritable non-volatile memory module and erasing data stored in the first physical erasing unit.
US09582407B2
Mechanisms are provided for performing security role definition testing. An application is received in a container of a runtime environment of the data processing system. The application has methods and security role definitions associated with the methods. A properties object, which specifies a user identifier to security role mapping, is received in the container. A test application is executed, in the container, by the processor, on an execution of the methods of the application based on the user identifier to security role mapping and the security role definitions. The test application tests an operation of the application with regard to the security role definitions. A result of the execution of the test application on the execution of the methods of the application is then output.
US09582406B1
Method and system for automatically generating executable system-level tests. The method includes obtaining a system design including interrelation between components of the system design, actions the components are operable to perform, and constraints relating to the performance of the actions; receiving at least an initial action input to be tested; automatically generating a complete test scenario including: solving a logic layer CSP, including automatically scheduling actions and data paths of the test scenario, and assigning values to logic attributes of the actions and data, satisfying constraints relating to the logic layer, and solving a data layer CSP, satisfying constraints relating to data attributes taking into account the constraints relating to the logic layer; and generating the executable system-level test by assembling the initial action and the set of scheduled actions and data paths and the data attributes.
US09582404B2
A method for testing multiple language versions of a browser-based application. A host language Hypertext Transfer Protocol (HTTP) request issued by a host language browser is received. The host language HTTP request is configured to be sent to a host server address. The host language HTTP request comprises parameter strings in a host language. A target language HTTP request is generated by replacing each host parameter string of at least one host parameter string of the parameter strings in the received HTTP request with a respective target parameter string associated with a target language that differs from the host language. The generated target language HTTP request is configured to be sent to a target server address associated with and different from the host server address.
US09582403B2
A method, system, and/or computer program product tests combined code changesets in a software product. One or more combinations of two or more changesets are selected, wherein a changeset is a set of changes to a software product submitted by a single developer source. For each combination of two or more changesets, an interaction between changesets is calculated, wherein the interaction is an overlapping of code found in two or more changesets. A combination of two or more changesets that has a predetermined minimum interaction between changesets is selected for building and testing.
US09582396B2
Techniques for debugging are presented. Executable instructions, as they are executed, along with variable values, as they appear when being processed, are output as an executable instruction set when an executable application comprising the executable instructions are processed. The outputted executable instruction set includes the processing flow sequence that occurred within the executable application when the executable application was processed.
US09582391B2
A method of validating the end to end performance of a mobile device including performance of applications, related services, and the mobile device by automating the conditions of the End User environment. The method is accomplished by leveraging stress models and applying these to automate the stressing of applications, their related services, while the device performance is being monitored by varying the emulated radio network and packet data network conditions.
US09582390B2
A method for testing computing hardware detects the current time as being within a predetermined time period and transfers virtual machines (VMs) from a plurality of physical machines to other physical machines as targets according to a load balancing strategy. The load balancing strategy sums of a load ratio of one physical machine including the VM and a load ratio of one physical machine as a target for the transfer; if the sum of the two ratios is less than a preset load ratio, the VM-transferring physical machine is put into a standby state when the transfer takes place as long as the current time is still inside the predetermined time period. Physical machines which are in the standby state and have not been tested are awoken, and the awoken physical machines are connected to the server for testing.
US09582388B2
An integrated circuit device comprises multiple cores each comprising one or more separate input and output interfaces, the multiple cores integrated within the integrated circuit device to function as a single computer system. Internal inter-chip connection links are disposed on the integrated circuit device for connecting one or more cores with at least one other core via the one or more separate input and output interfaces. One or more bidirectional access ports are communicatively connected in each path of the inter-chip connection links to enable a separate external access point to each of the one or more separate input and output interfaces of the cores, wherein each of the one or more bidirectional access ports is dynamically selectable as each of an external input interface of the integrated circuit device and an external output interface of the integrated circuit device.
US09582384B2
A method and system of replicating data where data is copied from a host server to a storage device in a first group of storage devices. A receipt is sent from the first group of storage devices to the host server when the data has been copied to all storage devices within the first group. The data is copied from the first group to at least one further group of storage devices. A receipt is sent from each further group of storage devices to the first group of storage devices when the data has been copied to all storage devices within each further group.
US09582382B1
A method, system, and computer product for hardening a snapshot in a journal based replication environment comprising a production and replication site, the replicated environment running in production side protection mode, the method comprising sending notification of a start of the check from the production site to the replication site, receiving the notification at the replication site, and recording the start of the check, running a check on the replication environment, associating the check with one or more snapshots, upon completion of the check, and storing the results of the check on the replication site.
US09582381B2
Systems and methods for multi-threaded server control automation for disaster recovery are described. A method may include initiating a disaster recovery sequence on two or more processors, wherein the disaster recovery sequence comprises a plurality of subsequences. The method may also include implementing the disaster recovery sequence on the two or more processors in parallel, wherein one or more subsequences of the disaster recovery sequence are implemented on the two or more processors in parallel. Upon completion of the disaster recovery sequence, at least one server partition is repurposed from a first configuration, such as a test configuration, to a second configuration, such as a production configuration.
US09582370B2
A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.
US09582355B2
Embodiments provide methodologies for reliably storing data within a storage system using liquid distributed storage control. Such liquid distributed storage control operates to compress repair bandwidth utilized within a storage system for data repair processing to the point of operating in a liquid regime. Liquid distributed storage control logic of embodiments may employ a lazy repair policy, repair bandwidth control, a large erasure code, and/or a repair queue. Embodiments of liquid distributed storage control logic may additionally or alternatively implement a data organization adapted to allow the repair policy to avoid handling large objects, instead streaming data into the storage nodes at a very fine granularity.
US09582345B2
Systems and methods for importing data from data sources over a network while correcting and transforming the data are described. A data migration server receives data from various data sources. The data migration server repairs and transforms the received data before transmitting the data to a new data server. In some embodiments, the data migration server repairs data before formatting the data, and in other embodiments, the data migration server formats data before repairing the data. The data migration server also verifies the accuracy of the data, either by comparing the data against data requested and received from third-party servers or in reference to other data from the data sources.
US09582344B2
A method for predicting anomalies in a computer application includes during runtime of the computer application, detecting traffic metrics and incident tickets associated with the computer application, the incident ticket indicating an incident might occur in the computer application; calculating a threshold based on absolute values of second order differences associated with the traffic metrics, wherein the threshold is such that when the absolute value of the second order difference associated with the traffic metrics exceeds the threshold, a recall rate Rrecall that the computer application is recalled is maximized; obtaining predicted metrics of the computer application in a next time period based on the traffic metrics; and in response to an absolute value of a second order difference associated with the predicted metrics exceeding the threshold, predicting potential anomalies of the computer application in the next time period.
US09582343B2
An example method is provided to process an input in a virtualized computing environment. The virtualized computing environment may include a physical machine running a host operating system and a virtualization software with one or more virtual machines. The example method may include detecting activation of at least one key input that causes a first message to be generated, the first message associated with the key input, comparing the first message with a set of stored messages, wherein any of the set of stored messages can be properly executed by targets in both the host operating system and the virtual machine but with different responses, and determining, based on the comparing, whether the first message is intended for a target in the host operating system or in the virtual machine.
US09582341B2
A semiconductor device may include a first processor transferring a plurality of command data sets, a mailbox receiving and storing the plurality of command data sets, and a second processor receiving command data sets of the mailbox, wherein the first processor may transfer at least one abort slot number to the mailbox, and wherein the mailbox may search and abort a command data set having a slot number which is identical to an abort slot number among the plurality of command data sets.
US09582339B2
Embodiments of computer-implemented methods, systems, computing devices, and computer-readable media (transitory and non-transitory) are described herein for accelerating a task that includes operation of a plurality of software modules among a plurality of parallel processing threads. In various embodiments, operation of the software modules may include postponement of operation of a first of the plurality of software modules in a first of the processing threads until a determination that the first software module is not deemed in operation. In various embodiments, the first software module may be deemed in operation while itself in operation or while awaiting completion of operation of any other software module called by the first software module.
US09582336B2
Methods and systems for resource segmentation include dividing a time horizon to be partitioned into time slots based on a minimum partition size; determining resource usage for multiple virtual machines in each of the plurality of time slots; determining a set of partitioning schemes that includes every possible partitioning of the time slots into a fixed number of partitions; for each partitioning scheme in the set of partitioning schemes, determining a cost using a processor based on a duration of each partition and a resource usage metric; and selecting a partitioning scheme that has a lowest cost.
US09582334B2
A method for resource management in MapReduce architecture. The method includes: determining a ratio r of an input data amount of a Map task and an output data amount of the Map task and an average size R of a record in Map output results; determining a memory size Memory_size that can be allocated to the Map task corresponding to a Map slot; according to the determined r, R and Memory_size, determining an input split size appropriate for the Map task; and allocating an input split with the input split size in a MapReduce job to be processed to the Map task occupying the Map slot. An apparatus for same is also provided.
US09582333B2
Disclosed aspects manage a set of assets of a shared pool of configurable computing resources. A set of usage data is established by the shared pool of configurable computing resources. The set of usage data corresponds to usage of the set of assets by a set of users. The shared pool of configurable computing resources determines an asset load-order based on the set of usage data. An operation associated with the set of assets is performed by the shared pool of configurable computing resources. In response to performing the operation associated with the set of assets, the set of assets is loaded based on the asset load-order by the shared pool of configurable computing resources.
US09582331B2
This disclosure relates generally to systems and methods of operating systems and more particularly to systems and methods for a smart operating system for integrating dynamic case management into a process management platform. In one embodiment, a computer-implemented dynamic case management method includes creating a plurality of lightweight stateless computing processes; placing the processes in a WAIT state; receiving a request to initiate a process instance corresponding to a lightweight stateless process; placing at least one of the processes in an EXECUTING state; processing the process instance by the processes placed in the EXECUTING state; determining a next process for the process instance; and routing the process instance to the next process.
US09582330B2
A method and system is disclosed for providing a distributed technical computing environment for distributing technical computing tasks from a technical computing client to technical computing workers for execution of the tasks on one or more computers systems. Tasks can be defined on a technical computing client, and the tasks organized into jobs. The technical computing client can directly distribute tasks to one or more technical computing workers. Furthermore, the technical computing client can submit tasks, or jobs comprising tasks, to an automatic task distribution mechanism that distributes the tasks automatically to one or more technical computing workers providing technical computing services. The technical computing worker performs technical computing of tasks and the results of the execution of tasks may be provided to the technical computing client. Data associated with the tasks is managed by a programmable interface associated with a data storage repository. The interface allows the various entities of the distributed technical computing environment to access data services performable by the interface or by a file system or a database and database management system associated with the data.
US09582327B2
Systems and methods for providing a compute-centric object store. An exemplary method may include receiving a request to perform a compute operation on at least a portion of an object store from a first user, the request identifying parameters of the compute operation, assigning virtual operating system containers to the objects of the object store from a pool of virtual operating system containers. The virtual operating system containers may perform the compute operation on the objects according to the identified parameters of the request. The method may also include clearing the virtual operating system containers and returning the virtual operating system containers to the pool.
US09582323B2
A method for scheduling the execution of a computer instruction, receive an entitlement processor resource percentage for a logical partition on a computer system. The logical partition is associated with a hardware thread of a processor of the computer system. The entitlement processor resource percentage for the logical partition is stored in a register of the hardware thread associated with the logical partition. An instruction is received from the logical partition of the computer system and the processor dispatches the instruction based on the entitlement processor resource percentage stored in the register of the hardware thread associated with the logical partition.
US09582317B2
A method of determining a second application related to a first application being executed by using a use log of a portable terminal and executing the second application according to a user input and an apparatus for supporting the same are provided. The portable terminal may determine the second application related to the first application being executed, based on a use log collected in a previous context state identical or similar to a current context state of a user. At this time, in order to determine the current context state of the user, the portable terminal may use information related to a location of the portable terminal and information related to a current time.
US09582303B2
Techniques are described for placing virtual machines (VM) on computer hosts. In one embodiment, a user may compose a constraint specification document which includes VM and host properties and how they are retrieved, as well as constraint predicates that define valid VM placements on hosts. Use of the constraint specification document permits new constraints, including constraints that involve new properties, to be handled without requiring changing the underlying code for collecting required input data and processing said data to determine whether placement constraints are satisfied. Instead, based on the constraint specification document, a resource scheduler or high availability module may program a programmable data collector to fetch the needed properties from the appropriate places. Then, the resource scheduler or high availability module may parse the constraint predicates, evaluate potential placements to determine whether the constraint predicates are satisfied, and place VMs according to placements that satisfy the constraint predicates.
US09582298B2
Technologies are disclosed herein for executing commands within virtual machine (“VM”) instances. A public web service application programming interface (“API”) is exposed within a service provider network that includes methods relating to the execution of commands within VM instances. For example, the API might include a method for obtaining a list of the commands that can be executed within a VM instance. The API might also include a method for requesting the execution of a command within a VM instance. The API might also include a method for requesting data describing the status of the execution of a command within a VM instance. The API might also expose other methods. A software agent executing on a VM instance may be utilized to provide a list of commands that can be executed in the VM, to execute requested commands, and to provide data describing the status of execution of a command.
US09582295B2
A determination is made that a configuration architectural mode facility is installed in a computing environment that is configured for a plurality of architectural modes and has a defined power-on sequence that is to power-on the computing environment in one architectural mode of the plurality of architectural modes. Based on determining that the configuration architectural mode facility is installed, the computing environment is reconfigured to restrict use of the one architectural mode. The reconfiguring includes selecting a different power-on sequence to power-on the computing environment in another architectural mode of the plurality of architectural modes, wherein the another architectural mode is different from the one architectural mode, and executing the different power-on sequence to power-on the computing environment in the another architectural mode in place of the one architectural mode restricting use of the one architectural mode.
US09582279B2
Execution of condition-based instructions is facilitated. A condition-based instruction is obtained, as well as a confidence level associated with the instruction. The confidence level is checked, and based on the confidence level being a first value, a predicted operation of the instruction, which is based on a predictor, is unconditionally performed. Further, based on the confidence level being a second value, a specified operation of the instruction, which is based on a determined condition, is conditionally performed.
US09582277B2
A method for selectively predicating instructions in an instruction stream by determining a first register address from an instruction, determining a second register address based on a value stored at the first register address, and determining whether to predicate the instruction based at least in part on a value stored at the second register address. Predication logic may analyze the instruction to determine the first register address, analyze a register corresponding to the first register address to determine the second register address, and communicate a predication signal to an execution unit based at least in part on the value stored at the second register address.
US09582263B2
Embodiments of the present invention relate to scheduling updates on a personal electronic device based on biometric data gathered from a user. The personal electronic device, or another computing device, may receive a pending software update. The personal electronic device, or another computing device, may receive biometric data of the user from one or more biometric sensors. The biometric data may provide sufficient information to determine a sleep status of the user. The personal electronic device, or another computing device, may determine a sleep status of the user. The personal electronic device, or another computing device, may install the pending software update in response to determining that the user is sleeping. The personal electronic device, or another computing device, may delay the pending software update in response to determining that the user is not sleeping.
US09582255B1
A method, executed by a computer, for splitting live register ranges includes identifying one or more H pathways comprising one or more H nodes having high register pressure, identifying an L pathway consisting of two or more L nodes, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway, wherein the register splitting instructions are inserted at a starting node of the one or more H pathways. A computer program product and computer system corresponding to the above method are also disclosed herein.
US09582251B2
A processing network including a plurality of lookup and decision engines (LDEs) each having one or more configuration registers and a plurality of on-chip routers forming a matrix for routing the data between the LDEs, wherein each of the on-chip routers is communicatively coupled with one or more of the LDEs. The processing network further including an LDE compiler stored on a memory and communicatively coupled with each of the LDEs, wherein the LDE compiler is configured to generate values based on input source code that when programmed into the configuration registers of the LDEs cause the LDEs to implement the functionality defined by the input source code.
US09582249B2
An assemblage for monitoring an output of a random generator is provided, which assemblage compares chronologically successive sample values at a sampling point with one another in order to detect a relationship of the compared sample values with one another.
US09582246B2
A contextual state of a graphical user interface presented via a display of the computing system is identified. A voice command is selected from a set of voice commands based on the contextual state of the graphical user interface. A context-specific voice-command suggestion corresponding to the selected voice command is identified. A graphical user interface including the context-specific voice-command suggestion is presented via a display.
US09582244B2
In one aspect, an example method for outputting an alert indicating a functional state of a back-up audio-broadcast system involves: a computing device receiving a first audio-stream that represents first audio-content; the computing device generating a first signature based, at least in part, upon an extent of mute/non-mute transitions included within the first audio-content; the computing device receiving a second audio-stream that represents second audio-content; the computing device generating a second signature based, at least in part, upon an extent of mute/non-mute transitions included within the second audio-content; the computing device making a determination that the generated first-signature and the generated second-signature lack a threshold extent of similarity; and responsive to the determination that the generated first-signature and the generated second-signature lack the threshold extent of similarity, the computing device outputting an alert.
US09582228B2
A document administration system includes an administration unit, a discrimination information image discriminating unit, and an image forming apparatus which, forms an image on a recording medium in case that the discrimination information image discriminating unit discriminates that the recording medium has the discrimination information image before the image is formed on the recording medium, and forms the image and the discrimination information image based on the discrimination information connected to the image on the recording medium in case that the discrimination information image discriminating unit discriminates that the recording medium does not have the discrimination information image before the image is formed on the recording medium.
US09582225B2
Apparatus and methods related to a framework for carrying out tasks using transactions with printing networks are provided. The framework is provided to utilize a printing network. The printing network can include a plurality of printing-related devices that include at least one of: a cloud server, a print server, a controlling computing device, a client computing device, and a printing device. The framework can be configured to enable one or more operations to be performed by at least some of the plurality of printing-related devices. Software of the framework can be installed on each of the plurality of printing-related devices. The framework can be utilized to enable an operation of the one or more operations to be performed by at least some of the plurality of printing-related devices.
US09582223B2
For efficient reclamation of pre-allocated direct memory access (DMA) memory in a computing environment, hot-add random access memory (RAM) is emulated for a general purpose use by reclamation of pre-allocated DMA memory reserved at boot time for responding to an emergency by notifying a non-kernel use device user that the non-kernel use device has a smaller window, stopping and remapping to the smaller window, and notifying a kernel that new memory has been added, wherein the new memory is a region left after the remap.
US09582222B2
A data storage caching architecture supports using native local memory such as host-based RAM, and if available, Solid State Disk (SSD) memory for storing pre-cache delta-compression based delta, reference, and independent data by exploiting content locality, temporal locality, and spatial locality of data accesses to primary (e.g. disk-based) storage. The architecture makes excellent use of the physical properties of the different types of memory available (fast r/w RAM, low cost fast read SSD, etc) by applying algorithms to determine what types of data to store in each type of memory. Algorithms include similarity detection, delta compression, least popularly used cache management, conservative insertion and promotion cache replacement, and the like.
US09582220B2
Systems, methods and/or devices are used to enable notification of a trigger condition to reduce declared capacity of a storage device in a multi-storage-device storage system. In one aspect, the method includes: (1) obtaining, for each storage device of a plurality of storage devices, one or more metrics of the storage device, the storage device including non-volatile memory, (2) detecting a trigger condition for reducing declared capacity of the non-volatile memory of a respective storage device of the plurality of storage devices, the trigger condition detected in accordance with the one or more metrics of two or more of the storage devices, and (3) notifying a host of the trigger condition for reducing declared capacity of the non-volatile memory of the respective storage device, the trigger condition for enabling performance of an amelioration process to reduce declared capacity of the non-volatile memory of the respective storage device.
US09582211B2
A method of operation in a non-volatile memory system for deferring, in accordance with a determination to reduce power consumption by the non-volatile memory system, execution of commands in a command queue corresponding to a distinct set of non-volatile memory devices during a respective wait period. In some implementations, the respective wait period for a first distinct set of non-volatile memory devices in at least two distinct sets is at least partially non-overlapping with the respective wait period for a second distinct set of non-volatile memory devices in the at least two distinct sets.
US09582195B2
A system, method, and computer program product are provided for ordering a plurality of write commands associated with a storage device. In operation, a plurality of write commands associated with a storage device to be sent to a device are identified. Additionally, an order of the plurality of write commands is determined, the determined order being known by the device. Further, the plurality of write commands are ordered in the determined order.
US09582191B2
Methods of operating electronic systems having a memory include reading indications of memory block quality from a plurality of memory blocks of the memory in which a memory defect has been detected, wherein a value of the indication of memory block quality stored in a respective memory block of the plurality of memory blocks indicates a type of memory defect detected in the respective memory block, and, in response to the values of the indications of memory block quality, deeming a first portion of memory blocks of the plurality of memory blocks as usable, allocating a second portion of memory blocks of the plurality of memory blocks for storing only data of a particular type, and indicating a third portion of memory blocks of the plurality of memory blocks as defective.
US09582189B2
Methods, systems, and computer program products for dynamic tuning of memory in MapReduce systems are provided herein. A method includes analyzing (i) memory usage of a first sub-set of multiple tasks associated with a MapReduce job and (ii) an amount of data utilized across the first sub-set of the multiple tasks; determining a memory size to be allocated to the first sub-set of the multiple tasks based on said analyzing, wherein said memory size minimizes a cost function related to said memory usage and said amount of data utilized; performing a task-wise performance comparison among a second sub-set of the multiple tasks associated with the MapReduce job using the determined memory size to be allocated to the first sub-set of the multiple tasks to generate a set of memory allocation results; and dynamically applying the set of memory allocation results to one or more additional tasks associated with the MapReduce job.
US09582177B2
The present invention is directed to a method and apparatus for sending and retrieving location relevant information to a user by selecting and designating a point of interest that is displayed on a graphical user interface and sending the location information associated with that point of interest to a receiver that is also selected using the graphical user interface. The location relevant information may also include mapped routes, waypoints, geo-fenced areas, moving vehicles etc. Updated location relevant information may also be continuously sent to the user while generating updated mapping information on the graphical user interface. The present invention may be practiced by using communication devices such as a personal computer, a personal digital assistance, in-vehicle navigation systems, or a mobile telephone.
US09582175B2
An apparatus includes a display control unit, including a processor, configured to control a display to display a plurality of objects and receive a selection of one of the plurality of objects by a user as a selected object. The display control unit is configured to control the display to move the selected object when a move command is received from the user. The display control unit is configured to control the display to group additionally selected objects with the selected object when additional objects are selected by the user and a group command is received from the user. The display control unit is configured to control the display to independently move the additionally selected objects with respect to the selected object until the additionally selected objects are grouped with the selected object.
US09582174B2
A display apparatus configured to move a drag object on a screen in accordance with an operation of a pointer. The display apparatus can include a detection unit configured to detect a target object on the screen, the target object being a destination of the drag object, and a display control unit configured to display the drag object in a position closer to the target object than a display position of the pointer moved in accordance with an operation performed by a user.
US09582162B2
A non-limiting example game system includes an information processing apparatus that functions as a game apparatus to which a terminal device and a television are connected. A game screen is displayed on the television and an item screen is displayed on an LCD of the terminal device, for example. If a player touches-on an item in the item screen and drags the item onto an assigning image, and then, performs a touch-off, the item is assigned to an operating button corresponding to the assigning image. When an item is touched-on, images corresponding to the item and the assigning image are displayed on the game screen in a superposed manner.
US09582146B2
Apparatus has at least one processor and at least one memory having computer-readable code stored thereon which when executed controls the at least one processor: to cause a list of search results to be displayed, each of the search results being caused to be displayed with a number of elements of associated information, wherein the number is greater than or equal to zero; after a predetermined time period in which no user input is received, to cause the number of elements of associated information that are displayed for each of plural ones of the search results to be increased; and to respond to a user initiated scroll command after the number of elements of associated information that are caused to be displayed for each of plural ones of the search results has been increased by causing the number of elements of associated information that are displayed to be decreased.
US09582145B2
Provided herein are method, apparatus, and computer program products for facilitating a learning user interface. The interface may be presented as a plurality of dynamic icons representing a plurality of items. The interface may be facilitated by receiving, by a processor, a selection indication associated with one item of the plurality of dynamic icons. The interface may be facilitated by determining, via the processor, at least one suggested item of the plurality of items based on the selection indication. The interface may also be facilitated by determining a visual bias for at least one suggested dynamic icon representing the at least one suggested item relative to at least one secondary dynamic icon and may be facilitated by applying the visual bias, via the interface, to the at least one suggested dynamic icon.
US09582144B2
A three-dimensional display presents a plurality of icons that are associated with a user interface. These icons include at least a first icon presented at a first depth of presentation and at least a second icon presented at a second, different depth of presentation. By one approach this first icon is available for interaction by an input component of the user interface while the second icon is unavailable for interaction by the input component of the user interface. The aforementioned first depth of presentation may be substantially coincide with a surface, for example, a touch-sensitive display, of the corresponding electronic device. So configured, the first icon (which is presently available for selection) appears at a depth that coincides with that surface. This approach can serve to facilitate three-dimensional presentation of an icon based on whether it is available for interaction via an input component of a user interface.
US09582139B1
A method of configuring a mobile device includes providing for a mobile computing device a plurality of device profiles that each define a manner in which the mobile computing device interacts with a user, operating the mobile computing device using a first profile of the plurality of device profiles, automatically, and without user input, identifying by the mobile computing device that the mobile computing device has changed states, in response to the determining, presenting a user of the mobile computing device with a list of device profiles available to the mobile computing device and a selectable control for selecting one of the profiles in the list, receiving, from the user, an instruction to switch to a second profile of the device profiles in the list that is separate and distinct form the first profile, and configuring the mobile computing device to operate according to the second profile.
US09582136B2
An exemplary method includes a media service provider system 1) generating, based on a first set of most-accessed media programs of a first media distribution model of a media service and a second set of most-accessed media programs of a second media distribution model of the media service, data representative of a merged set of most-accessed media programs that includes at least one media program from the first set of most-accessed media programs and at least one media program from the second set of most-accessed media programs and 2) providing, for display, user interface content representing the merged set of most-accessed media programs. In the method, the first media distribution model includes a digital media distribution model that utilizes a digital media distribution channel, and the second media distribution model includes a physical media distribution model that utilizes a physical media distribution channel.
US09582130B2
The transparent conductor includes a transparent substrate, a first metal oxide layer, a metal layer, and a second metal oxide layer laminated. At least one of the first and the second metal oxide layers contains four components of Al2O3, ZnO, SnO2, and Ga2O3. X, Y, and Z are within a region surrounded by line segments between point a, point b, point c, point d, point e, and point f, in terms of (X, Y, Z) coordinates shown in a ternary diagram in FIG. 2, or on the line segments where X is a total molar ratio of the Al2O3 and the ZnO, Y is a molar ratio of the SnO2, and Z is a molar ratio of the Ga2O3, relative to the total amount of the four components. A molar ratio of the Al2O3 relative to the total amount of the four components is 1.5 to 3.5% by mole.
US09582126B2
The present invention relates to the field of display technology, and particularly to a double-sided touch display device which comprises a touch feedback electrode, a first touch receiving electrode and a second touch receiving electrode, wherein the first touch receiving electrode and the second touch receiving electrode are provided at both sides of the touch feedback electrode, respectively. The double-sided touch display device achieve functions of both double-sided touch and transparent display, and has a simple structure and low production cost.
US09582125B2
A capacitive touch sensitive device includes a matrix of pads patterned in a first electrically conductive material on a substrate. Horizontally adjacent pads within each even row of the matrix are electrically coupled to one another via channels to form a plurality of horizontally arranged electrodes. Insulators are positioned over respective channels. Conductive links are formed over respective insulators and are configured to electrically couple vertically adjacent pads between odd rows of the matrix to form a plurality of vertically arranged electrodes. The dimensions of the channels and the conductive links are configured such that an RC time-constant (RCtc) of each of the vertically arranged electrodes substantially matches an RCtc of each of the horizontally arranged electrodes.
US09582122B2
Touch-sensitive bezel techniques are described. In one or more implementations, touch sensors located in a display portion and a bezel portion detect a touch input and determine, based on one or more characteristics of the touch input, a likelihood that a user intends or does not intend to interact with the computing device. A location of a centroid of an area of the touch input is on such characteristic that can be utilized. In at least some implementations, the bezel portion has display capabilities such that when a touch input is detected, the display capabilities in a region of the bezel portion can be made active to cause a menu to be displayed in the region of the bezel.
US09582120B2
A display device which may enhance recognition precision of an operation command input by a user, a mobile terminal which communicates with the display device, and a method of controlling the same are provided. The display device includes a display panel, an image collector configured to collect an image of an object in a first direction, a communicator configured to receive an image of the object collected in a second direction by a mobile terminal, and a controller configured to process the collected image and the received image together into a processed image, to recognize a motion of the processed image, determine an operation command corresponding to the recognized motion, and control an operation of the display panel based on the determined operation command.
US09582119B2
An image capture method comprises generating a synchronization signal based on modulated illumination; and synchronizing image frame capture of at least one image sensor using the synchronization signal with the illumination timing of an active pointer within a region of interest in the field of view of the at least one image sensor.
