多个栅极沟槽形成在有源晶胞区中的半导体基板中。至少一其他沟槽形成在不同区域。每个栅极沟槽都具有在底部的第一导电材料，以及在顶部的第二导电材料。在栅极沟槽中，第一绝缘层将第一导电材料与基板隔开，第二绝缘层将第二导电材料与基板隔开，第三绝缘层将第一导电材料和第二导电材料隔开。至少一其他沟槽都含有一部分第一导电材料，呈半U型，在其他沟槽底部，以及第二导电材料在其他沟槽顶部。在其他沟槽中，第三绝缘层将第一导电材料和第二导电材料隔开。第一绝缘层的厚度大于第三绝缘层的厚度，第三绝缘层的厚度大于第二绝缘层的厚度。

A plurality of gate trenches is formed into a semiconductor substrate in an active cell region. One or more other trenches are formed in a different region. Each gate trench has a first conductive material in lower portions and s second conductive material in upper portions. In the gate trenches, a first insulating layer separates the first conductive material from the substrate, a second insulating layer separates the second conductive material from the substrate and a third insulating material separates the first and second conductive materials. The other trenches contain part of the first conductive material in a half-U shape in lower portions and part of the second conductive material in upper portions. In the other trenches, the third insulating layer separates the first and second conductive materials. The first insulating layer is thicker than the third insulating layer, and the third insulating layer is thicker than the second.