Invention Grant
- Patent Title: Package structure and method for forming the same
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Application No.: US15347912Application Date: 2016-11-10
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Publication No.: US10014260B2Publication Date: 2018-07-03
- Inventor: Yi-Da Tsai , Cheng-Ping Lin , Wei-Hung Lin , Chih-Wei Lin , Ming-Da Cheng , Ching-Hua Hsieh , Chung-Shi Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L21/56 ; H01L23/538 ; H01L23/00 ; H01L23/31 ; H01L21/48 ; H01L21/683 ; H01L23/29

Abstract:
Package structures and methods for forming the same are provided. A method for forming a package structure includes providing a carrier substrate. The method also includes forming a conductive layer over the carrier substrate. The method further includes forming a passivation layer over the conductive layer. The passivation layer includes openings that expose portions of the conductive layer. In addition, the method includes bonding integrated circuit dies to the portions of the conductive layer through bumps. There is a space between the integrated circuit dies and the passivation layer. The method also includes filling the space with a first molding compound. The first molding compound surrounds the bumps and the integrated circuit dies. The method further includes forming a second molding compound capping the first molding compound and the integrated circuit dies. The passivation layer has a sidewall that is covered by the second molding compound.
Public/Granted literature
- US20180130749A1 PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME Public/Granted day:2018-05-10
Information query
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