A transistor with a multi-strained layer superlattice (SLS) structure is provided. A first strained layer superlattice (SLS) layer is arranged over a substrate. A first buffer layer is arranged over the first SLS layer and includes dopants configured to increase a resistance of the first buffer layer. A second SLS layer is arranged over the first buffer layer. A second buffer layer is arranged over the second SLS layer and includes dopants configured to increase a resistance of the second buffer layer. A channel layer is arranged over the second buffer layer. An active layer is arranged over and directly abuts the channel layer. The channel and active layers collectively define a heterojunction. A method for manufacturing the transistor is also provided.