A vertical memory device includes a mold structure and channels. The mold structure includes gate electrodes and insulation patterns arranged on a substrate in which the gate electrodes are disposed at a plurality of levels, respectively, in a vertical direction substantially perpendicular to an upper surface of the substrate. The insulation patterns are disposed between neighboring ones of the gate electrodes. The channels extend through the mold structure in the vertical direction in a hole, and are spaced apart from each other in a horizontal direction substantially parallel to the upper surface of the substrate in the hole. The gate electrodes each includes a plurality of first gate electrodes spaced apart from each other substantially horizontally. The hole extends through one of the first gate electrodes included in each of the gate electrodes. A plurality of channels may be formed in the one hole in the one first gate electrode.