Invention Grant
- Patent Title: Internal spacers for nanowire semiconductor devices
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Application No.: US15907878Application Date: 2018-02-28
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Publication No.: US10361268B2Publication Date: 2019-07-23
- Inventor: Kurt Wostyn , Hans Mertens , Liesbeth Witters , Andriy Hikavyy , Naoto Horiguchi
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Agency: McDonnell Boehnen Hulbert & Berghoff LLP
- Priority: EP17159054 20170303
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/66 ; B82Y40/00 ; H01L21/8234 ; H01L29/08 ; B82Y10/00 ; H01L29/417 ; H01L29/775 ; H01L21/311

Abstract:
A method of forming an internal spacer between nanowires, the method involving: providing a fin comprising a stack of layers of sacrificial material alternated with nanowire material, and selectively removing part of the sacrificial material, thereby forming a recess. The method also involves depositing dielectric material into the recess resulting in dielectric material within the recess and excess dielectric material outside the recess, where a crevice remains in the dielectric material in each recess, and removing the excess dielectric material using a first etchant. The method also involves enlarging the crevices to form a gap using a second etchant such that a remaining dielectric material still covers the sacrificial material and partly covers the nanowire material, and such that outer ends of the nanowire material are accessible; and growing electrode material on the outer ends such that the electrode material from neighboring outer ends merge, thereby covering the gap.
Public/Granted literature
- US20180254321A1 Internal Spacers for Nanowire Semiconductor Devices Public/Granted day:2018-09-06
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