Invention Grant
- Patent Title: Three-dimensional semiconductor devices
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Application No.: US15849121Application Date: 2017-12-20
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Publication No.: US10396094B2Publication Date: 2019-08-27
- Inventor: Ji-Hoon Choi , Sunggil Kim , Seulye Kim , Hongsuk Kim , Phil Ouk Nam , Jaeyoung Ahn
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine, Whitt & Francos, PLLC
- Priority: KR10-2017-0053103 20170425
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/28 ; H01L29/06 ; H01L29/10 ; H01L29/51 ; H01L29/66 ; H01L21/311 ; H01L29/792 ; H01L27/1157 ; H01L27/11565 ; H01L27/11582

Abstract:
A three-dimensional semiconductor device includes gate electrodes sequentially stacked on a substrate, a channel structure penetrating the gate electrodes and being connected to the substrate, an insulating gap-fill pattern provided within the channel structure and surrounded by the channel structure as viewed in a plan view, and a conductive pattern on the insulating gap-fill pattern. At least a portion of the insulating gap-fill pattern is received in the conductive pattern, and at least a portion of the conductive pattern is interposed between at least that portion of the insulating gap-fill pattern and the channel structure.
Public/Granted literature
- US20180308859A1 THREE-DIMENSIONAL SEMICONDUCTOR DEVICES Public/Granted day:2018-10-25
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