Invention Grant
- Patent Title: Negative capacitance circuits including temperature-compensation biasings
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Application No.: US15859431Application Date: 2017-12-30
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Publication No.: US10425042B2Publication Date: 2019-09-24
- Inventor: Ani Xavier , Neeraj Shrivastava , Arun Mohan , Shagun Dusad
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Charles A. Brill; Frank D. Cimino
- Main IPC: H03F3/45
- IPC: H03F3/45 ; H03F1/30 ; H03F1/02
Abstract:
In some examples, an amplifier stage includes a voltage-gain amplifier stage and a negative capacitance circuit coupled to the voltage-gain amplifier stage, the negative capacitance circuit comprising a first transistor that provides a first temperature-biased current.
Public/Granted literature
- US20190207564A1 NEGATIVE CAPACITANCE CIRCUITS INCLUDING TEMPERATURE-COMPENSATION BIASINGS Public/Granted day:2019-07-04
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