Invention Grant
- Patent Title: Source and drain surface treatment for multi-gate field effect transistors
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Application No.: US15964398Application Date: 2018-04-27
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Publication No.: US10446669B2Publication Date: 2019-10-15
- Inventor: Wei-Han Fan , Wei-Yuan Lu , Yu-Lin Yang , Chun-Hsiang Fan , Sai-Hooi Yeong
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/08 ; H01L21/02 ; H01L21/265 ; H01L21/3065 ; H01L29/78 ; H01L21/225 ; H01L21/311

Abstract:
A method includes providing a structure having a substrate and a fin extending from the substrate, wherein the fin includes a first semiconductor material and has a source region, a channel region, and a drain region for a transistor; forming a gate stack over the channel region; performing a surface treatment to the fin in the source and drain regions, thereby converting an outer portion of the fin in the source and drain regions into a different material other than the first semiconductor material; etching the converted outer portion of the fin in the source and drain regions, thereby reducing a width of the fin in the source and drain regions; and depositing an epitaxial layer over the fin in the source and drain regions.
Public/Granted literature
- US20190165139A1 Source and Drain Surface Treatment for Multi-Gate Field Effect Transistors Public/Granted day:2019-05-30
Information query
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