A capacitor cell is provided. A first PMOS transistor is coupled between a power supply and a first node, having a gate coupled to a second node. A first NMOS transistor coupled between a ground and the second node, having a gate coupled to the first node. A second PMOS transistor, having a drain coupled to the second node, a gate coupled to the second node, and a source coupled to the power supply or the first node. A second NMOS transistor, having a drain coupled to the first node, a gate coupled to the first node, and a source coupled to the ground or the second node.