Invention Grant
- Patent Title: Low-k gate spacer and formation thereof
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Application No.: US15833912Application Date: 2017-12-06
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Publication No.: US10483168B2Publication Date: 2019-11-19
- Inventor: Bo-Cyuan Lu , Chunyao Wang , Jr-Hung Li , Chung-Ting Ko , Chi On Chui
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8234 ; H01L27/088 ; H01L29/423 ; H01L29/417 ; H01L29/78

Abstract:
Gate structures and gate spacers, along with methods of forming such, are described. In an embodiment, a structure includes an active area on a substrate, a gate structure on the active area and over the substrate, and a low-k gate spacer on the active area and along a sidewall of the gate structure. The gate structure includes a conformal gate dielectric on the active area and includes a gate electrode over the conformal gate dielectric. The conformal gate dielectric extends vertically along a first sidewall of the low-k gate spacer. In some embodiments, the low-k gate spacer can be formed using a selective deposition process after a dummy gate structure has been removed in a replacement gate process.
Public/Granted literature
- US20190148238A1 LOW-K GATE SPACER AND FORMATION THEREOF Public/Granted day:2019-05-16
Information query
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