公开(公告)号：US12087775B2

公开(公告)日：2024-09-10

申请号：US17464369

申请日：2021-09-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Ting-Gang Chen ,  Bo-Cyuan Lu ,  Tai-Chun Huang ,  Chi On Chui ,  Chieh-Ping Wang

IPC分类号： H01L27/00 ,  H01L21/02 ,  H01L21/764 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L27/0924 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/02326 ,  H01L21/0259 ,  H01L21/764 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/823878 ,  H01L29/0665 ,  H01L29/41733 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/78696

摘要： A semiconductor device includes first transistor having a first gate stack and first source/drain regions on opposing sides of the first gate stack; a second transistor having a second gate stack and second source/drain regions on opposing sides of the second gate stack; and a gate isolation structure separating the first gate stack from the second gate stack. The gate isolation structure includes a dielectric liner having a varied thickness along sidewalls of the first gate stack and the second gate stack and a dielectric fill material over the dielectric liner, wherein the dielectric fill material comprises a seam.

公开(公告)号：US11843028B2

公开(公告)日：2023-12-12

申请号：US17322087

申请日：2021-05-17

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： I-Wen Wu ,  Fu-Kai Yang ,  Chen-Ming B. Lee ,  Mei-Yun Wang ,  Jr-Hung Li ,  Bo-Cyuan Lu

IPC分类号： H01L29/06 ,  H01L27/088 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/762 ,  H01L21/32

CPC分类号： H01L29/0649 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/0234 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/02359 ,  H01L21/3105 ,  H01L21/31053 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/7855 ,  H01L21/32 ,  H01L21/823437

摘要： Semiconductor devices and methods of fabricating semiconductor devices are provided. The present disclosure provides a semiconductor device that includes a first fin structure and a second fin structure each extending from a substrate; a first gate segment over the first fin structure and a second gate segment over the second fin structure; a first isolation feature separating the first and second gate segments; a first source/drain (S/D) feature over the first fin structure and adjacent to the first gate segment; a second S/D feature over the second fin structure and adjacent to the second gate segment; and a second isolation feature also disposed in the trench. The first and second S/D features are separated by the second isolation feature, and a composition of the second isolation feature is different from a composition of the first isolation feature.

公开(公告)号：US20230215758A1

公开(公告)日：2023-07-06

申请号：US18182485

申请日：2023-03-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wen-Yen Chen ,  Li-Ting Wang ,  Wan-Chen Hsieh ,  Bo-Cyuan Lu ,  Tai-Chun Huang ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L21/762 ,  H01L21/768 ,  H01L21/764 ,  H01L21/02

CPC分类号： H01L21/76224 ,  H01L21/76882 ,  H01L21/764 ,  H01L21/7684 ,  H01L21/02532

摘要： A method includes forming a first protruding fin and a second protruding fin over a base structure, with a trench located between the first protruding fin and the second protruding fin, depositing a trench-filling material extending into the trench, and performing a laser reflow process on the trench-filling material. In the reflow process, the trench-filling material has a temperature higher than a first melting point of the trench-filling material, and lower than a second melting point of the first protruding fin and the second protruding fin. After the laser reflow process, the trench-filling material is solidified. The method further includes patterning the trench-filling material, with a remaining portion of the trench-filling material forming a part of a gate stack, and forming a source/drain region on a side of the gate stack.

公开(公告)号：US11605555B2

公开(公告)日：2023-03-14

申请号：US16939718

申请日：2020-07-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wen-Yen Chen ,  Li-Ting Wang ,  Wan-Chen Hsieh ,  Bo-Cyuan Lu ,  Tai-Chun Huang ,  Huicheng Chang ,  Yee-Chia Yeo

IPC分类号： H01L21/762 ,  H01L21/768 ,  H01L21/02 ,  H01L21/764

摘要： A method includes forming a first protruding fin and a second protruding fin over a base structure, with a trench located between the first protruding fin and the second protruding fin, depositing a trench-filling material extending into the trench, and performing a laser reflow process on the trench-filling material. In the reflow process, the trench-filling material has a temperature higher than a first melting point of the trench-filling material, and lower than a second melting point of the first protruding fin and the second protruding fin. After the laser reflow process, the trench-filling material is solidified. The method further includes patterning the trench-filling material, with a remaining portion of the trench-filling material forming a part of a gate stack, and forming a source/drain region on a side of the gate stack.

公开(公告)号：US20220384249A1

公开(公告)日：2022-12-01

申请号：US17818390

申请日：2022-08-09

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Bo-Cyuan Lu ,  Tai-Chun Huang ,  Chih-Tang Peng ,  Chi On Chui

IPC分类号： H01L21/762 ,  H01L27/092 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/764

摘要： A semiconductor device a method of forming the same are provided. The semiconductor device includes a substrate, a first isolation structure and a second isolation structure over the substrate, a semiconductor fin over the substrate and between the first isolation structure and the second isolation structure, and a third isolation structure extending through the semiconductor fin and between the first isolation structure and the second isolation structure. A top surface of the semiconductor fin is above a top surface of the first isolation structure and a top surface of the second isolation structure. The third isolation structure includes a first dielectric material and a second dielectric material over the first dielectric material. An interface between the first dielectric material and the second dielectric material is below the top surface of the first isolation structure and the top surface of the second isolation structure.

公开(公告)号：US11444173B2

公开(公告)日：2022-09-13

申请号：US15797973

申请日：2017-10-30

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsiang-Ku Shen ,  Jin-Mu Yin ,  Tsung-Chieh Hsiao ,  Chia-Lin Chuang ,  Li-Zhen Yu ,  Dian-Hau Chen ,  Shih-Wei Wang ,  De-Wei Yu ,  Chien-Hao Chen ,  Bo-Cyuan Lu ,  Jr-Hung Li ,  Chi-On Chui ,  Min-Hsiu Hung ,  Hung-Yi Huang ,  Chun-Cheng Chou ,  Ying-Liang Chuang ,  Yen-Chun Huang ,  Chih-Tang Peng ,  Cheng-Po Chau ,  Yen-Ming Chen

IPC分类号： H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/311 ,  H01L29/78 ,  H01L21/768 ,  H01L21/3065 ,  H01L29/45 ,  H01L29/08 ,  H01L29/165

摘要： Structures and formation methods of a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes forming fin spacers over sidewalls of the fin structure and gate spacers over sidewalls of the gate structure. In addition, the method includes forming a source/drain structure over the fin structure and depositing a dummy material layer to cover the source/drain structure. The dummy material layer is removed faster than the gate spacers during the removal of the dummy material layer. The method further includes forming a salicide layer over the source/drain structure and the fin spacers, and forming a contact over the salicide layer. The dummy material layer includes Ge, amorphous silicon or spin-on carbon.

公开(公告)号：US12119268B2

公开(公告)日：2024-10-15

申请号：US18363439

申请日：2023-08-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chieh-Ping Wang ,  Ting-Gang Chen ,  Bo-Cyuan Lu ,  Tai-Chun Huang ,  Chi On Chui

IPC分类号： H01L21/8234 ,  H01L21/02 ,  H01L21/28 ,  H01L21/311 ,  H01L21/762 ,  H01L21/764 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/823481 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/28123 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/762 ,  H01L21/764 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/66795 ,  H01L29/785

摘要： A method for forming a semiconductor device includes: forming a gate structure over a fin, where the fin protrudes above a substrate; forming an opening in the gate structure; forming a first dielectric layer along sidewalls and a bottom of the opening, where the first dielectric layer is non-conformal, where the first dielectric layer has a first thickness proximate to an upper surface of the gate structure distal from the substrate, and has a second thickness proximate to the bottom of the opening, where the first thickness is larger than the second thickness; and forming a second dielectric layer over the first dielectric layer to fill the opening, where the first dielectric layer is formed of a first dielectric material, and the second dielectric layer is formed of a second dielectric material different from the first dielectric material.

公开(公告)号：US20240014077A1

公开(公告)日：2024-01-11

申请号：US18150642

申请日：2023-01-05

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Bo-Cyuan Lu ,  Hsin-Che Chiang ,  Tai-Chun Huang ,  Chi On Chui

IPC分类号： H01L21/8238 ,  H01L27/092

CPC分类号： H01L21/823878 ,  H01L27/0924 ,  H01L21/823821

摘要： A method includes forming a gate stack on a semiconductor region, etching the gate stack to form a first trench separating the gate stack into a first gate stack portion and a second gate stack portion, and forming a gate isolation region filling the first trench. The gate isolation region includes a silicon nitride liner, and a silicon oxide filling-region overlapping a first bottom portion of the silicon nitride liner. The method further includes etching the gate stack to form a second trench and to reveal a protruding semiconductor fin, and etching the protruding semiconductor fin to extend the second trench into the bulk semiconductor substrate. A fin isolation region is formed to fill the second trench. The fin isolation region includes a silicon oxide liner, and a silicon nitride filling-region overlapping a second bottom portion of the silicon oxide liner.

公开(公告)号：US20230386931A1

公开(公告)日：2023-11-30

申请号：US18363439

申请日：2023-08-01

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chieh-Ping Wang ,  Ting-Gang Chen ,  Bo-Cyuan Lu ,  Tai-Chun Huang ,  Chi On Chui

IPC分类号： H01L21/8234 ,  H01L21/28 ,  H01L27/088 ,  H01L29/06 ,  H01L21/02 ,  H01L21/311 ,  H01L21/764 ,  H01L21/762 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/823481 ,  H01L21/28123 ,  H01L27/0886 ,  H01L29/0649 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/31116 ,  H01L21/764 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/31111 ,  H01L21/762 ,  H01L29/66795 ,  H01L29/785

摘要： A method for forming a semiconductor device includes: forming a gate structure over a fin, where the fin protrudes above a substrate; forming an opening in the gate structure; forming a first dielectric layer along sidewalls and a bottom of the opening, where the first dielectric layer is non-conformal, where the first dielectric layer has a first thickness proximate to an upper surface of the gate structure distal from the substrate, and has a second thickness proximate to the bottom of the opening, where the first thickness is larger than the second thickness; and forming a second dielectric layer over the first dielectric layer to fill the opening, where the first dielectric layer is formed of a first dielectric material, and the second dielectric layer is formed of a second dielectric material different from the first dielectric material.

公开(公告)号：US11823955B2

公开(公告)日：2023-11-21

申请号：US17663321

申请日：2022-05-13

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chieh-Ping Wang ,  Ting-Gang Chen ,  Bo-Cyuan Lu ,  Tai-Chun Huang ,  Chi On Chui

IPC分类号： H01L21/8234 ,  H01L21/28 ,  H01L27/088 ,  H01L29/06 ,  H01L21/02 ,  H01L21/311 ,  H01L21/764 ,  H01L21/762 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L21/823481 ,  H01L21/0217 ,  H01L21/02164 ,  H01L21/28123 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/762 ,  H01L21/764 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/66795 ,  H01L29/785

摘要： A method for forming a semiconductor device includes: forming a gate structure over a fin, where the fin protrudes above a substrate; forming an opening in the gate structure; forming a first dielectric layer along sidewalls and a bottom of the opening, where the first dielectric layer is non-conformal, where the first dielectric layer has a first thickness proximate to an upper surface of the gate structure distal from the substrate, and has a second thickness proximate to the bottom of the opening, where the first thickness is larger than the second thickness; and forming a second dielectric layer over the first dielectric layer to fill the opening, where the first dielectric layer is formed of a first dielectric material, and the second dielectric layer is formed of a second dielectric material different from the first dielectric material.