Invention Grant
- Patent Title: Integrated circuit having chemically modified spacer surface
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Application No.: US15447795Application Date: 2017-03-02
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Publication No.: US10483261B2Publication Date: 2019-11-19
- Inventor: Brian K. Kirkpatrick , Amitabh Jain
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L29/772
- IPC: H01L29/772 ; H01L27/092 ; H01L21/8238 ; H01L29/66 ; H01L29/78 ; H01L29/417 ; H01L29/423 ; H01L29/778 ; H01L21/02 ; H01L21/3065 ; H01L21/3105 ; H01L21/311 ; H01L29/161

Abstract:
A method of fabricating an integrated circuit includes depositing a first dielectric material onto a semiconductor surface of a substrate having a gate stack thereon including a gate electrode on a gate dielectric. The first dielectric material is etched to form sidewall spacers on sidewalls of the gate stack. A top surface of the first dielectric material is chemically converted to a second dielectric material by adding at least one element to provide surface converted sidewall spacers. The second dielectric material is chemically bonded across a transition region to the first dielectric material.
Public/Granted literature
- US20170179126A1 INTEGRATED CIRCUIT HAVING CHEMICALLY MODIFIED SPACER SURFACE Public/Granted day:2017-06-22
Information query
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