Invention Grant
- Patent Title: Systems and methods to enhance passivation integrity
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Application No.: US16218842Application Date: 2018-12-13
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Publication No.: US10515866B2Publication Date: 2019-12-24
- Inventor: Ying-Chieh Liao , Han-Wei Yang , Chen-Chung Lai , Kang-Min Kuo , Bor-Zen Tien
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Eschweiler & Potashnik, LLC
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L23/31 ; H01L23/00 ; H01L23/48 ; H01L21/768 ; H01L23/482 ; H01L23/522 ; H01L29/40 ; H01L29/41 ; H01L23/29 ; H01L23/532

Abstract:
Some embodiments relate to a semiconductor device. The semiconductor device includes a layer disposed over a substrate. A conductive body extends through the layer. A plurality of bar or pillar structures are spaced apart from one another and laterally surround the conductive body. The plurality of bar or pillar structures are generally concentric around the conductive body.
Public/Granted literature
- US20190115273A1 SYSTEMS AND METHODS TO ENHANCE PASSIVATION INTEGRITY Public/Granted day:2019-04-18
Information query
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