Invention Grant
- Patent Title: Dual data streams sharing dual level two cache access ports to maximize bandwidth utilization
-
Application No.: US16139858Application Date: 2018-09-24
-
Publication No.: US10606598B2Publication Date: 2020-03-31
- Inventor: Joseph Zbiciak , Timothy Anderson
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Brian D. Graham; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F9/312
- IPC: G06F9/312 ; G06F9/34 ; G06F11/00 ; G06F12/02 ; G06F13/18 ; G06F9/32 ; G06F9/38 ; G06F9/30 ; G06F13/16 ; G06F13/40 ; G06F12/0875 ; G06F12/0897 ; G06F9/345 ; G06F11/10

Abstract:
A streaming engine employed in a digital data processor specifies fixed first and second read only data streams. Corresponding stream address generator produces address of data elements of the two streams. Corresponding steam head registers stores data elements next to be supplied to functional units for use as operands. The two streams share two memory ports. A toggling preference of stream to port ensures fair allocation. The arbiters permit one stream to borrow the other's interface when the other interface is idle. Thus one stream may issue two memory requests, one from each memory port, if the other stream is idle. This spreads the bandwidth demand for each stream across both interfaces, ensuring neither interface becomes a bottleneck.
Public/Granted literature
- US20190026111A1 DUAL DATA STREAMS SHARING DUAL LEVEL TWO CACHE ACCESS PORTS TO MAXIMIZE BANDWIDTH UTILIZATION Public/Granted day:2019-01-24
Information query