Invention Grant
- Patent Title: Processor core power event tracing
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Application No.: US15911577Application Date: 2018-03-05
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Publication No.: US10656697B2Publication Date: 2020-05-19
- Inventor: Tsvika Kurts , Beeman C. Strong , Richard B. O'Connor , Michael W. Chynoweth , Rajshree A. Chabukswar , Avner Lottem , Itamar Kazachinsky , Michael Mishaeli , Anthony Wojciechowski , Vikas R. Vasisht
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: G06F1/32
- IPC: G06F1/32 ; G06F11/34 ; G06F11/30 ; G06F1/3206
Abstract:
A processor includes a trace unit to monitor activity by the processor and generate trace packets indicative of the activity by the processor. The trace packets may include four additional packets for processor event tracing including: a dormant state request packet, a code execution stop packet, a dormant state entry packet, and a dormant state exit packet.
Public/Granted literature
- US20190050041A1 PROCESSOR CORE POWER EVENT TRACING Public/Granted day:2019-02-14
Information query
