Invention Grant
- Patent Title: Apparatuses including test segment circuits having latch circuits for testing a semiconductor die
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Application No.: US16416242Application Date: 2019-05-19
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Publication No.: US10663513B2Publication Date: 2020-05-26
- Inventor: Kevin G. Werhane , Nathaniel J. Meier , Bin Liu
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G01R31/307
- IPC: G01R31/307 ; G01R31/30 ; H03L7/081 ; H03K5/133 ; H01J37/26 ; G01R31/28 ; G01R31/26 ; G01R31/50

Abstract:
Apparatuses including test segment circuits and methods for testing the same are disclosed. An example apparatus includes a plurality of segment lines configured to form a ring around a die and a plurality of test segment circuits, each test segment circuit coupled to at least two segment lines of the plurality of segment lines. Each test segment circuit is coupled to a portion of a first signal line, a portion of a second signal line, and a portion of a third signal line and each test segment circuit is configured to control an operation performed on at least one segment line of the plurality of segment lines.
Public/Granted literature
- US20190271739A1 APPARATUSES INCLUDING TEST SEGMENT CIRCUITS HAVING LATCH CIRCUITS FOR TESTING A SEMICONDUCTOR DIE Public/Granted day:2019-09-05
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