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    Semiconductor device with self-lock security and associated methods and systems
    3.
    发明授权
    Semiconductor device with self-lock security and associated methods and systems 有权

    公开(公告)号：US11494522B2

    公开(公告)日：2022-11-08

    申请号：US16677486

    申请日：2019-11-07

    Applicant: Micron Technology, Inc.

    Inventor： Nathaniel J. Meier ,  Brenton P. Van Leeuwen

    IPC: G06F21/79

    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which self-lock security may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a predefined event associated with the memory device operation. The predefined event may include an operating parameter of the memory device, one or more commands directed to the memory device, or both. The memory device may monitor the predefined event and determine that the predefined event satisfies a threshold. The threshold may be related to a time elapsed since the predefined event has occurred or a certain pattern in the one or more commands. Subsequently, the memory device may disable a circuit configured to access the fuse array based on the determination such that an access to the fuse array is no longer allowed.

    Apparatuses and methods for staggered timing of targeted refresh operations
    4.
    发明授权
    Apparatuses and methods for staggered timing of targeted refresh operations 有权

    公开(公告)号：US11227649B2

    公开(公告)日：2022-01-18

    申请号：US16375716

    申请日：2019-04-04

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Nathaniel J. Meier ,  James S. Rehmeyer

    IPC: G11C11/406 ,  G11C11/408

    Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for staggering the timing of targeted refresh operations. A memory device may include a number of memory banks, at least some of which may be simultaneously entered into a refresh mode. A given memory bank may perform an auto-refresh operation or a targeted refresh operation, which may draw less power than the auto-refresh operation. The timing of the targeted refresh operations may be staggered between the refreshing memory banks, such that a portion of the refreshing memory banks are performing a targeted refresh operation simultaneously with a portion of the refreshing memory banks performing an auto-refresh operation.

    Semiconductor device with secure access key and associated methods and systems
    5.
    发明授权
    Semiconductor device with secure access key and associated methods and systems 有权

    公开(公告)号：US11182308B2

    公开(公告)日：2021-11-23

    申请号：US16677478

    申请日：2019-11-07

    Applicant: Micron Technology, Inc.

    Inventor： Nathaniel J. Meier ,  Brenton P. Van Leeuwen

    IPC: G06F12/14 ,  G06F3/06 ,  G06F21/62 ,  H04L9/32 ,  G11C11/4074 ,  G11C17/16 ,  G06F21/79

    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security measures may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a secure access key. In some cases, a customer may define and store a user-defined access key in the fuse array. In other cases, a manufacturer of the memory device may define a manufacturer-defined access key (e.g., an access key based on fuse identification (FID), a secret access key), where a host device coupled with the memory device may obtain the manufacturer-defined access key according to certain protocols. The memory device may compare an access key included in a command directed to the memory device with either the user-defined access key or the manufacturer-defined access key to determine whether to permit or prohibit execution of the command based on the comparison.

    METHODS FOR ROW HAMMER MITIGATION AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAME
    6.
    发明申请
    METHODS FOR ROW HAMMER MITIGATION AND MEMORY DEVICES AND SYSTEMS EMPLOYING THE SAME 有权

    公开(公告)号：US20210358539A1

    公开(公告)日：2021-11-18

    申请号：US17387934

    申请日：2021-07-28

    Applicant: Micron Technology, Inc.

    Inventor： Timothy B. Cowles ,  Dean D. Gans ,  Jiyun Li ,  Nathaniel J. Meier ,  Randall J. Rooney

    IPC: G11C11/406

    Abstract: Memory devices and methods of operating memory devices in which refresh management operations can be scheduled on an as-needed basis for those memory portions where activity (e.g., activations in excess of a predetermined threshold) warrants a refresh management operation are disclosed. In one embodiment, an apparatus comprises a memory including a memory location, and circuitry configured to determine a count corresponding to a number of activations at the memory location, to schedule a refresh management operation for the memory location in response to the count exceeding a first predetermined threshold, and to decrease the count by an amount corresponding to the first predetermined threshold in response to executing the scheduled refresh management operation. The circuitry may be further configured to disallow, in response to determining that the count has reached a maximum permitted value, further activations at the memory location until after the count has been decreased.

    Semiconductor device with secure access key and associated methods and systems
    7.
    发明授权
    Semiconductor device with secure access key and associated methods and systems 有权

    公开(公告)号：US11132470B2

    公开(公告)日：2021-09-28

    申请号：US16677286

    申请日：2019-11-07

    Applicant: Micron Technology, Inc.

    Inventor： Brenton P. Van Leeuwen ,  Nathaniel J. Meier

    IPC: G06F7/04 ,  G06F21/79 ,  H04L9/06 ,  G06F21/81 ,  G06F12/00

    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security measures may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a secure access key. In some cases, a customer may define and store a user-defined access key in the fuse array. In other cases, a manufacturer of the memory device may define a manufacturer-defined access key (e.g., an access key based on fuse identification (FID), a secret access key), where a host device coupled with the memory device may obtain the manufacturer-defined access key according to certain protocols. The memory device may compare an access key included in a command directed to the memory device with either the user-defined access key or the manufacturer-defined access key to determine whether to permit or prohibit execution of the command based on the comparison.

    SEMICONDUCTOR DEVICE WITH SECURE ACCESS KEY AND ASSOCIATED METHODS AND SYSTEMS
    8.
    发明申请
    SEMICONDUCTOR DEVICE WITH SECURE ACCESS KEY AND ASSOCIATED METHODS AND SYSTEMS 有权

    公开(公告)号：US20210141741A1

    公开(公告)日：2021-05-13

    申请号：US16677478

    申请日：2019-11-07

    Applicant: Micron Technology, Inc.

    Inventor： Nathaniel J. Meier ,  Brenton P. Van Leeuwen

    IPC: G06F12/14 ,  G06F21/79 ,  G11C17/16 ,  G11C11/4074

    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security measures may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a secure access key. In some cases, a customer may define and store a user-defined access key in the fuse array. In other cases, a manufacturer of the memory device may define a manufacturer-defined access key (e.g., an access key based on fuse identification (FID), a secret access key), where a host device coupled with the memory device may obtain the manufacturer-defined access key according to certain protocols. The memory device may compare an access key included in a command directed to the memory device with either the user-defined access key or the manufacturer-defined access key to determine whether to permit or prohibit execution of the command based on the comparison.

    Apparatuses and methods for staggered timing of targeted refresh operations
    9.
    发明授权
    Apparatuses and methods for staggered timing of targeted refresh operations 有权

    公开(公告)号：US10964375B2

    公开(公告)日：2021-03-30

    申请号：US16375716

    申请日：2019-04-04

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Nathaniel J. Meier ,  James S. Rehmeyer

    IPC: G11C11/406 ,  G11C11/408

    Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for staggering the timing of targeted refresh operations. A memory device may include a number of memory banks, at least some of which may be simultaneously entered into a refresh mode. A given memory bank may perform an auto-refresh operation or a targeted refresh operation, which may draw less power than the auto-refresh operation. The timing of the targeted refresh operations may be staggered between the refreshing memory banks, such that a portion of the refreshing memory banks are performing a targeted refresh operation simultaneously with a portion of the refreshing memory banks performing an auto-refresh operation.

    REFRESH COMMAND MANAGEMENT
    10.
    发明申请
    REFRESH COMMAND MANAGEMENT 审中-公开

    公开(公告)号：US20200176047A1

    公开(公告)日：2020-06-04

    申请号：US16205980

    申请日：2018-11-30

    Applicant: Micron Technology, Inc.

    Inventor： Nathaniel J. Meier ,  James S. Rehmeyer ,  Sang-Kyun Park ,  Makoto Kitayama

    IPC: G11C11/406 ,  G06F3/06 ,  G11C11/22

    Abstract: Methods, systems, and devices for refresh command management are described. A memory device may conduct a refresh operation to preserve the integrity of data stored to one or more memory cells. In some examples, the frequency of refresh operations conducted may be based on the memory device's temperature and may be initiated based on one or more commands received from an external device (e.g., a host device). Each command may be transmitted by the host device at a defined rate, which may impact the rate at which the memory device conducts one or more refresh operations. The memory device may postpone or skip at least a portion of one or more refresh operations based on one or more operating parameters of the memory device.

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