Invention Grant
- Patent Title: Integrated structures of vertically-stacked memory cells
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Application No.: US14679926Application Date: 2015-04-06
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Publication No.: US10672785B2Publication Date: 2020-06-02
- Inventor: Fatma Arzum Simsek-Ege , Meng-Wei Kuo , John D. Hopkins
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/11556
- IPC: H01L27/11556 ; H01L27/11582 ; H01L21/311 ; H01L21/3213 ; H01L21/28 ; H01L27/11524 ; H01L27/1157

Abstract:
Some embodiments include a method of forming vertically-stacked memory cells. An opening is formed through a stack of alternating insulative and conductive levels. Cavities are formed to extend into the conductive levels. Regions of the insulative levels remain as ledges which separate adjacent cavities from one another. Material is removed from the ledges to thin the ledges, and then charge-blocking dielectric and charge-storage structures are formed within the cavities. Some embodiments include an integrated structure having a stack of alternating insulative levels and conductive levels. Cavities extend into the conductive levels. Ledges of the insulative levels separate adjacent cavities from one another. The ledges are thinned relative to regions of the insulative levels not encompassed by the ledges. Charge-blocking dielectric and charge-storage structures are within the cavities.
Public/Granted literature
- US20160293623A1 Integrated Structures and Methods of Forming Vertically-Stacked Memory Cells Public/Granted day:2016-10-06
Information query
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