Invention Grant
- Patent Title: Memory device and fabrication method thereof
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Application No.: US16511862Application Date: 2019-07-15
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Publication No.: US10700264B2Publication Date: 2020-06-30
- Inventor: Wei-Hao Liao , Chih-Wei Lu , Hsi-Wen Tien , Pin-Ren Dai , Chung-Ju Lee
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Maschoff Brennan
- Main IPC: H01L43/02
- IPC: H01L43/02 ; H01L27/22 ; H01L43/12 ; H01L43/08

Abstract:
A method includes forming in sequence a bottom magnetic layer, a tunnel barrier layer, a top magnetic layer, and a top electrode layer over a bottom electrode layer; performing a first etching process to recess the top electrode layer, in which the first etching process stops before the top magnetic layer is etched; performing a second etching process to pattern the top electrode layer as a top electrode and the top magnetic layer as a patterned top magnetic layer, in which the second etching process stops before the bottom magnetic layer is etched; forming a first spacer around the top electrode and the patterned top magnetic layer; and after forming the first spacer, performing a third etching process to pattern the tunnel barrier layer as a patterned tunnel barrier layer and the bottom magnetic layer as a patterned bottom magnetic layer.
Public/Granted literature
- US20190341543A1 MEMORY DEVICE AND FABRICATION METHOD THEREOF Public/Granted day:2019-11-07
Information query
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