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    Semiconductor device
    2.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11569096B2

    公开(公告)日：2023-01-31

    申请号：US17327580

    申请日：2021-05-21

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    发明人： Hsi-Wen Tien ,  Wei-Hao Liao ,  Chih-Wei Lu ,  Pin-Ren Dai ,  Chung-Ju Lee

    IPC分类号： H01L21/48 ,  H01L23/532 ,  H01L23/522 ,  H01L23/528

    摘要： An semiconductor device includes a first dielectric layer, an etch stop layer, an interconnect structure, and a second dielectric layer. The etch stop layer is over the first dielectric layer. The interconnect structure includes a conductive via in the first dielectric layer and the etch stop layer, a conductive line over the conductive via, an intermediate conductive layer over the conductive line, and a conductive pillar over the intermediate conductive layer. The interconnect structure is electrically conductive at least from a top of the conductive pillar to a bottom of the conductive via. The second dielectric layer surrounds the conductive line, the intermediate conductive layer, and the conductive pillar, wherein a bottom of the second dielectric layer is lower than a top of the conductive line, and a top of the second dielectric layer is higher than the top of the conductive line.

    Magnetic tunnel junctions
    3.
    发明授权
    Magnetic tunnel junctions 有权

    公开(公告)号：US10964888B2

    公开(公告)日：2021-03-30

    申请号：US16840100

    申请日：2020-04-03

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    发明人： Pin-Ren Dai ,  Chung-Ju Lee ,  Chung-Te Lin ,  Chih-Wei Lu ,  Hsi-Wen Tien ,  Tai-Yen Peng ,  Chien-Min Lee ,  Wei-Hao Liao

    IPC分类号： H01L43/12 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10

    摘要： The present disclosure describes a method utilizing an ion beam etch process, instead of a RIE etch process, to form magnetic tunnel junction (MTJ) structures. For example, the method includes forming MTJ structure layers on an interconnect layer, where the interconnect layer includes a first area and a second area. The method further includes depositing a mask layer over the MTJ structure layers in the first area and forming masking structures over the MTJ structure layers in the second area. The method also includes etching with an ion beam etch process, the MTJ structure layers between the masking structures to form MTJ structures over vias in the second area of the interconnect layer; and removing, with the ion beam etch process, the mask layer, the top electrode, the MTJ stack, and a portion of the bottom electrode in the first area of the interconnect layer.

    Methods of etching metals in semiconductor devices
    7.
    发明授权
    Methods of etching metals in semiconductor devices 有权

    公开(公告)号：US11158518B2

    公开(公告)日：2021-10-26

    申请号：US16582412

    申请日：2019-09-25

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Wei-Hao Liao ,  Hsi-Wen Tien ,  Chih Wei Lu ,  Pin-Ren Dai ,  Chung-Ju Lee

    IPC分类号： H01L23/48 ,  H01L21/3213 ,  H01L23/522 ,  H01L23/532 ,  H01L21/033 ,  H01L21/768

    摘要： A semiconductor structure includes a conductive feature disposed over a semiconductor substrate, a via disposed in a first interlayer dielectric (ILD) layer over the conductive feature, and a metal-containing etch-stop layer (ESL) disposed on the via, where the metal-containing ESL includes a first metal and is resistant to etching by a fluorine-containing etchant. The semiconductor structure further includes a conductive line disposed over the metal-containing ESL, where the conductive line includes a second metal different from the first metal and is etchable by the fluorine-containing etchant, and where the via is configured to interconnect the conductive line to the conductive feature. Furthermore, the semiconductor structure includes a second ILD layer disposed over the first ILD layer.

    Interconnect structure
    8.
    发明授权
    Interconnect structure 有权

    公开(公告)号：US11018027B2

    公开(公告)日：2021-05-25

    申请号：US16988609

    申请日：2020-08-08

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    发明人： Hsi-Wen Tien ,  Wei-Hao Liao ,  Chih-Wei Lu ,  Pin-Ren Dai ,  Chung-Ju Lee

    IPC分类号： H01L21/48 ,  H01L23/532 ,  H01L23/522 ,  H01L23/528

    摘要： An interconnect structure includes a first dielectric layer, an etch stop layer, a conductive via, a conductive line, an intermediate conductive layer, a conductive pillar, and a second dielectric layer. The etch stop layer is over the first dielectric layer. The conductive via is in the first dielectric layer and the etch stop layer. The conductive line is over the conductive via. The intermediate conductive layer is over the conductive line. The conductive pillar is over the intermediate conductive layer. The second dielectric layer surrounds the conductive line, the intermediate conductive layer, and the conductive pillar, and a bottom of the second dielectric layer is lower than a top of the conductive line, and a top of the second dielectric layer is higher than the top of the conductive line.

    Memory device and fabrication method thereof
    9.
    发明授权
    Memory device and fabrication method thereof 有权

    公开(公告)号：US10756258B2

    公开(公告)日：2020-08-25

    申请号：US15860566

    申请日：2018-01-02

    申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

    发明人： Wei-Hao Liao ,  Hsi-Wen Tien ,  Chih-Wei Lu ,  Pin-Ren Dai ,  Chung-Ju Lee

    IPC分类号： H01L43/12 ,  H01L43/10 ,  H01L43/08 ,  H01L27/22

    摘要： A method for fabricating a memory device includes forming a bottom electrode over a substrate; forming an etch stop layer over and surrounding the bottom electrode; removing at least one portion of the etch stop layer to expose the bottom electrode; forming a stack layer over the bottom electrode and a remaining portion of the etch stop layer, the stack layer comprising a resistance switching layer; and etching the stack layer to form a stack over the bottom electrode, the stack comprising a resistance switching element over the bottom electrode and a top electrode over the resistance switching element, wherein the etch stop layer has a higher etch resistance to the etching than that of the resistance switching element.