Invention Grant
- Patent Title: Self testing circuit for power optimization
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Application No.: US15852407Application Date: 2017-12-22
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Publication No.: US10725104B2Publication Date: 2020-07-28
- Inventor: Amandeep Kaur , Sridhar Yadala , Jayanth Mysore Thimmaiah , Ravindra Arjun Madpur
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Addison
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Addison
- Agency: Vierra Magen Marcus LLP
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/319 ; G05B17/02 ; G05B23/02 ; G11C29/02 ; G11C11/4072 ; G01R31/30 ; G06F30/327 ; G11C29/50 ; G11C7/20 ; G11C5/14

Abstract:
Disclosed is an apparatus including a datapath and a test circuit. The datapath is configured to transfer data between a memory core and an IO interface. The datapath includes a plurality of circuits, and a memory core interface. The plurality of circuits operates according to a supply voltage. The test circuit is coupled to the datapath, and configured to determine, from a set of operable voltage levels of the supply voltage, a first minimum operable voltage level for the datapath to operate for the data traversing the datapath at a first frequency.
Public/Granted literature
- US20190195948A1 SELF TESTING CIRCUIT FOR POWER OPTIMIZATION Public/Granted day:2019-06-27
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