Invention Grant
- Patent Title: Selective capping processes and structures formed thereby
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Application No.: US15880389Application Date: 2018-01-25
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Publication No.: US10790142B2Publication Date: 2020-09-29
- Inventor: Chih-Chien Chi , Hsiao-Kuan Wei , Hung-Wen Su , Pei-Hsuan Lee , Hsin-Yun Hsu , Jui-Fen Chien
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/20 ; H01L29/66 ; H01L21/762 ; H01L29/49 ; H01L29/423 ; H01L21/28 ; H01L27/092 ; H01L21/324 ; H01L29/78 ; H01L21/3205 ; H01L29/417 ; H01L21/3105 ; H01L21/768

Abstract:
Embodiments disclosed herein relate generally to capping processes and structures formed thereby. In an embodiment, a conductive feature, formed in a dielectric layer, has a metallic surface, and the dielectric layer has a dielectric surface. The dielectric surface is modified to be hydrophobic by performing a surface modification treatment. After modifying the dielectric surface, a capping layer is formed on the metallic surface by performing a selective deposition process. In another embodiment, a surface of a gate structure is exposed through a dielectric layer. A capping layer is formed on the surface of the gate structure by performing a selective deposition process.
Public/Granted literature
- US20190164751A1 Selective Capping Processes and Structures Formed Thereby Public/Granted day:2019-05-30
Information query
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