Invention Grant
- Patent Title: Method of forming a vertical transistor pass gate device
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Application No.: US16670101Application Date: 2019-10-31
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Publication No.: US10930779B2Publication Date: 2021-02-23
- Inventor: Karthik Balakrishnan , Kangguo Cheng , Pouya Hashemi , Alexander Reznicek
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutuniian & Bitetto. P C.
- Agent L. Jeffrey Kelly
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/08 ; H01L29/06 ; H01L27/088 ; H01L29/423 ; H01L29/66 ; H01L21/311

Abstract:
A semiconductor device including a fin structure present on a supporting substrate to provide a vertically orientated channel region. A first source/drain region having a first epitaxial material with a diamond shaped geometry is present at first end of the fin structure that is present on the supporting substrate. A second source/drain region having a second epitaxial material with said diamond shaped geometry that is present at the second end of the fin structure. A same geometry for the first and second epitaxial material of the first and second source/drain regions provides a symmetrical device.
Public/Granted literature
- US20200066905A1 VERTICAL TRANSISTOR PASS GATE DEVICE Public/Granted day:2020-02-27
Information query
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