Invention Grant
- Patent Title: Method, system and device for integration of volatile and non-volatile memory bitcells
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Application No.: US16201080Application Date: 2018-11-27
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Publication No.: US10971229B2Publication Date: 2021-04-06
- Inventor: Akhilesh Ramlaut Jaiswal , Mudit Bhargava
- Applicant: Arm Limited
- Applicant Address: GB Cambridge
- Assignee: Arm Limited
- Current Assignee: Arm Limited
- Current Assignee Address: GB Cambridge
- Agency: Berkeley Law & Technology Group, LLP
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C14/00 ; G11C11/16 ; G11C11/418 ; G11C11/419 ; H01F10/32 ; G11C13/00 ; H01L43/02 ; H01L43/10
Abstract:
Disclosed are methods, systems and devices for operation of memory device. In one aspect, volatile memory bitcells and non-volatile memory bitcells may be integrated to facilitate transfer of stored values between the volatile and non-volatile memory bitcells.
Public/Granted literature
- US20190325961A1 METHOD, SYSTEM AND DEVICE FOR INTEGRATION OF VOLATILE AND NON-VOLATILE MEMORY BITCELLS Public/Granted day:2019-10-24
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