Invention Grant
- Patent Title: High-k metal gate process and device
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Application No.: US16852819Application Date: 2020-04-20
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Publication No.: US10971602B2Publication Date: 2021-04-06
- Inventor: Chien-Shun Liao , Huai-Tei Yang , Chun Chieh Wang , Yueh-Ching Pai , Chun-I Wu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/49 ; H01L29/78 ; H01L21/8234 ; H01L29/51 ; H01L29/66

Abstract:
An embodiment is a method of semiconductor processing. The method includes depositing a high-k gate dielectric layer over a semiconductor fin. A barrier layer is deposited over the high-k gate dielectric layer. A silicon passivation layer is deposited over the barrier layer. A nitrogen treatment is performed on the silicon passivation layer. A capping layer is deposited over the silicon passivation layer. The capping layer is annealed.
Public/Granted literature
- US20200251574A1 High-K Metal Gate Process and Device Public/Granted day:2020-08-06
Information query
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