Invention Grant
- Patent Title: Method for patterning a lanthanum containing layer
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Application No.: US16569820Application Date: 2019-09-13
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Publication No.: US11171061B2Publication Date: 2021-11-09
- Inventor: Kun-Yu Lee , Huicheng Chang , Che-Hao Chang , Ching-Hwanq Su , Weng Chang , Xiong-Fei Yu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/092 ; H01L29/66 ; H01L29/78 ; H01L21/28 ; H01L21/02 ; H01L21/311 ; H01L21/3115

Abstract:
Embodiments described herein relate to a method for patterning a doping layer, such as a lanthanum containing layer, used to dope a high-k dielectric layer in a gate stack of a FinFET device for threshold voltage tuning. A blocking layer may be formed between the doping layer and a hard mask layer used to pattern the doping layer. In an embodiment, the blocking layer may include or be aluminum oxide (AlOx). The blocking layer can prevent elements from the hard mask layer from diffusing into the doping layer, and thus, can improve reliability of the devices formed. The blocking layer can also improve a patterning process by reducing patterning induced defects.
Public/Granted literature
- US20200006157A1 Method for Patterning a Lanthanum Containing Layer Public/Granted day:2020-01-02
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