Invention Grant
- Patent Title: Wafer level testing of optical components
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Application No.: US16517404Application Date: 2019-07-19
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Publication No.: US11295994B2Publication Date: 2022-04-05
- Inventor: Shiyun Lin , Daniel Mahgerefteh , Bryan Park , Jin-Hyoung Lee
- Applicant: FINISAR CORPORATION
- Applicant Address: US CA Sunnyvale
- Assignee: FINISAR CORPORATION
- Current Assignee: FINISAR CORPORATION
- Current Assignee Address: US CA Sunnyvale
- Agency: Blank Rome LLP
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G02B6/42 ; G01R31/28 ; G02B6/13 ; G01R31/311 ; G02B1/11

Abstract:
A system may include a wafer that includes ICs and defines cavities. Each cavity may be formed in a BEOL layer of the wafer and proximate a different IC. The system may also include an interposer that includes a transparent layer configured to permit optical signals to pass through. The interposer may also include at least one waveguide located proximate the transparent layer. The at least one waveguide may be configured to adiabatically couple at least one optical signal out of the multiple ICs. Further, the interposer may include a redirecting element optically coupled to the at least one the waveguide. The redirecting element may be located proximate the transparent layer and may be configured to receive the at least one optical signal from the at least one waveguide. The redirecting element may also be configured to vertically redirect the at least one optical signal towards the transparent layer.
Public/Granted literature
- US20200027798A1 WAFER LEVEL TESTING OF OPTICAL COMPONENTS Public/Granted day:2020-01-23
Information query
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