- 专利标题: High performance fast Mux-D scan flip-flop
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申请号: US16726020申请日: 2019-12-23
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公开(公告)号: US11296681B2公开(公告)日: 2022-04-05
- 发明人: Amit Agarwal , Steven Hsu , Simeon Realov , Mahesh Kumashikar , Ram Krishnamurthy
- 申请人: Intel Corporation
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Schwabe, Williamson & Wyatt, P.C.
- 主分类号: H03K3/00
- IPC分类号: H03K3/00 ; H03K3/037 ; G01R31/3177 ; H03K3/038 ; H03K19/20
摘要:
A fast Mux-D scan flip-flop is provided, which bypasses a scan multiplexer to a master keeper side path, removing delay overhead of a traditional Mux-D scan topology. The design is compatible with simple scan methodology of Mux-D scan, while preserving smaller area and small number of inputs/outputs. Since scan Mux is not in the forward critical path, circuit topology has similar high performance as level-sensitive scan flip-flop and can be easily converted into bare pass-gate version. The new fast Mux-D scan flip-flop combines the advantages of the conventional LSSD and Mux-D scan flip-flop, without the disadvantages of each.
公开/授权文献
- US20210194469A1 HIGH PERFORMANCE FAST MUX-D SCAN FLIP-FLOP 公开/授权日:2021-06-24
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