Invention Grant
- Patent Title: Interposer package-on-package (PoP) with solder array thermal contacts
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Application No.: US16059535Application Date: 2018-08-09
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Publication No.: US11387175B2Publication Date: 2022-07-12
- Inventor: Debendra Mallik , Sanka Ganesan , Pilin Liu , Shawna Liff , Sri Chaitra Chavali , Sandeep Gaan , Jimin Yao , Aastha Uppal
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/28
- IPC: H01L23/28 ; H01L23/34 ; H01L23/538 ; H01L23/532 ; H01L23/498

Abstract:
Embodiments include an electronics package and methods of forming such packages. In an embodiment, the electronics package comprises a first package substrate. In an embodiment, the first package substrate comprises, a die embedded in a mold layer, a thermal interface pad over a surface of the die, and a plurality of solder balls over the thermal interface pad. In an embodiment, the thermal interface pad and the solder balls are electrically isolated from circuitry of the electronics package. In an embodiment, the electronics package further comprises a second package substrate over the first package substrate.
Public/Granted literature
- US20200051899A1 INTERPOSER PACKAGE-ON-PACKAGE (POP) WITH SOLDER ARRAY THERMAL CONTACTS Public/Granted day:2020-02-13
Information query
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