The present disclosure relates to a reconfigurable logic-in-memory device using a silicon transistor, according to the embodiment of the present disclosure, the reconfigurable logic-in-memory device using a silicon transistor comprises the silicon transistor including a drain region, a first channel region, a second channel region, a source region, and a gate region, wherein the silicon transistor performs a first channel operation while forming a first positive feedback loop in which an electron is a majority carrier in the first channel region and the second channel region depending on a level of a gate voltage Vin applied through the gate region or performs a second channel operation while forming a second positive feedback loop in which a hole is a majority carrier in the first channel region and the second channel region depending on the level of a gate voltage Vin applied through the gate region.