Invention Grant
- Patent Title: Three-dimensional memory device including stairless word line contact structures for and method of making the same
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Application No.: US16918463Application Date: 2020-07-01
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Publication No.: US11495612B2Publication Date: 2022-11-08
- Inventor: Yoshinobu Tanaka , Koichi Ito , Hideaki Hasegawa , Akihiro Tobioka , Sung Tae Lee
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: The Marbury Law Group PLLC
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/11556 ; H01L27/11519 ; H01L21/311 ; H01L27/11565 ; H01L27/11573 ; H01L27/11529

Abstract:
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings and support openings are formed through the alternating stack, and memory opening fill structures and support pillar structures are formed in the memory openings and in the support openings, respectively. Via cavities extending to each of the sacrificial material layers are formed through the alternating stack without forming any stepped surfaces in the alternating stack. The via cavities may be formed in areas that do not overlap with the support pillar structures, or in areas that include at least one support pillar structure. Sacrificial via fill structures are formed in the via cavies, and the sacrificial material layers are replaced with electrically conductive layers. The sacrificial via fill structures are removed, and a combination of a tubular dielectric spacer and a contact via structure can be formed in the via cavities.
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