Invention Grant
- Patent Title: Three-dimensional memory device including through-memory-level via structures and methods of making the same
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Application No.: US16893995Application Date: 2020-06-05
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Publication No.: US11515317B2Publication Date: 2022-11-29
- Inventor: Takaaki Iwai , Junpei Kanazawa , Hisakazu Otoi , Hironori Matsuoka , Raiden Matsuno
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Agency: The Marbury Law Group PLLC
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/11539 ; H01L27/11519 ; H01L27/11565 ; H01L27/11556

Abstract:
A three-dimensional memory device can include at least one alternating stack of insulating layers and electrically conductive layers located over a semiconductor material layer, memory stack structures vertically extending through the at least one alternating stack, and a vertical stack of dielectric plates interlaced with laterally extending portions of the insulating layers of the at least one alternating stack. A conductive via structure can vertically extend through each dielectric plate and the insulating layers, and can contact an underlying metal interconnect structure. Additionally or alternatively, support pillar structures can vertically extend through the vertical stack of dielectric plates and into an opening through the semiconductor material layer, and can contact lower-level dielectric material layers embedding the underlying metal interconnect structure to enhance structural support to the three-dimensional memory device during manufacture.
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