Invention Grant
- Patent Title: Package-on-package structure
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Application No.: US16934394Application Date: 2020-07-21
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Publication No.: US11532498B2Publication Date: 2022-12-20
- Inventor: Chih-Wei Lin , Hui-Min Huang , Ai-Tee Ang , Yu-Peng Tsai , Ming-Da Cheng , Chung-Shi Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/683
- IPC: H01L21/683 ; H01L23/498 ; H01L23/00 ; H01L25/00 ; H01L23/31 ; H01L25/10 ; H01L21/56 ; H01L25/065

Abstract:
A method comprises forming a plurality of interconnect structures including a dielectric layer, a metal line and a redistribution line over a carrier, attaching a semiconductor die on a first side of the plurality of interconnect structures, forming an underfill layer between the semiconductor die and the plurality of interconnect structures, mounting a top package on the first side the plurality of interconnect structures, wherein the top package comprises a plurality of conductive bumps, forming an encapsulation layer over the first side of the plurality of interconnect structures, wherein the top package is embedded in the encapsulation layer, detaching the carrier from the plurality of interconnect structures and mounting a plurality of bumps on a second side of the plurality of interconnect structures.
Public/Granted literature
- US20200350197A1 Package-on-Package Structure Public/Granted day:2020-11-05
Information query
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