Invention Grant
- Patent Title: Conductive feature structure including a blocking region
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Application No.: US17101858Application Date: 2020-11-23
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Publication No.: US11532503B2Publication Date: 2022-12-20
- Inventor: Pin-Wen Chen , Chia-Han Lai , Mei-Hui Fu , Min-Hsiu Hung , Ya-Yi Cheng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/768 ; H01L23/522 ; H01L23/532 ; H01L21/762

Abstract:
Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a structure includes a first dielectric layer over a substrate, a first conductive feature in the first dielectric layer, a second dielectric layer over the first dielectric layer, a second conductive feature in the second dielectric layer, and a blocking region disposed between the first conductive feature and the second conductive feature. The second conductive feature is disposed between and abutting a first sidewall of the second dielectric layer and a second sidewall of the second dielectric layer. The blocking region extends laterally at least from the first sidewall of the second dielectric layer to the second sidewall of the second dielectric layer.
Public/Granted literature
- US20210074580A1 Conductive Feature Formation and Structure Public/Granted day:2021-03-11
Information query
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