Invention Grant
- Patent Title: Semiconductor device structure having a multi-layer conductive feature and method making the same
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Application No.: US16875809Application Date: 2020-05-15
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Publication No.: US11532550B2Publication Date: 2022-12-20
- Inventor: Chun-Yuan Chen , Chia-Hao Chang , Cheng-Chi Chuang , Yu-Ming Lin , Chih-Hao Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L23/522 ; H01L23/528 ; H01L21/768 ; H01L23/532 ; H01L21/285 ; H01L21/288 ; H01L21/321 ; H01L29/78 ; H01L29/66 ; H01L21/762

Abstract:
The present disclosure provides a method of forming a semiconductor device structure. The method includes forming a trench in a dielectric layer on a semiconductor substrate; forming a bottom metal feature of a first metal in a lower portion of the trench by a selective deposition; depositing a barrier layer in an upper portion of the trench, the barrier layer directly contacting both a top surface of the bottom metal feature and sidewalls of the dielectric layer; and forming a top metal feature of a second metal on the barrier layer, filling in the upper portion of the trench, wherein the second metal is different from the first metal in composition.
Public/Granted literature
- US20210035906A1 Semiconductor Device Structure Having a Multi-Layer Conductive Feature and Method Making the Same Public/Granted day:2021-02-04
Information query
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