- Patent Title: Computation in-memory architecture for analog-to-digital conversion
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Application No.: US17162842Application Date: 2021-01-29
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Publication No.: US11551745B2Publication Date: 2023-01-10
- Inventor: Avishek Biswas , Mahesh Madhukar Mehendale
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Ming Wai Choy; Frank D. Cimino
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G11C11/4094 ; G11C11/4097 ; G11C11/4074 ; G11C11/4099 ; G06F7/52 ; G11C11/54 ; G11C7/10 ; G06N3/063 ; G06N3/04 ; G11C7/16 ; G11C11/412

Abstract:
A device includes a comparator to provide an indication of a difference between Vp on a first terminal coupled to a top plate of each of a first group of differential capacitors, and Vn on a second terminal coupled to a top plate of each of a second group of differential capacitors. The device includes a control circuit coupled to the comparator. The control circuit is to receive a first indication of a difference between Vp and Vn; responsive to the first indication, cause a first driver to provide a reference voltage to bottom plates of one of the first and second groups, and cause a second driver to provide a ground voltage to bottom plates of the other of the first and second groups; receive a second indication of a difference between Vp and Vn; and provide a digital value responsive to the first indication and the second indication.
Public/Granted literature
- US20210241820A1 COMPUTATION IN-MEMORY ARCHITECTURE FOR ANALOG-TO-DIGITAL CONVERSION Public/Granted day:2021-08-05
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