Invention Grant
- Patent Title: System in package dual connector
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Application No.: US17090911Application Date: 2020-11-06
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Publication No.: US11589460B2Publication Date: 2023-02-21
- Inventor: Tin Poay Chuah , Min Suet Lim , Chee Chun Yee , Yew San Lim , Eng Huat Goh
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Viering, Jentschura & Partner mbB
- Priority: MYPI2020004586 20200904
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/14

Abstract:
A multilayer printed circuit board including a first printed circuit board portion, including a first inserting connector, including a plurality of contacts for creating a first removable bus connection; a second printed circuit board portion, including a second inserting connector, including a plurality of contacts for creating a second removable bus connection; a third printed circuit board portion, connected between the first printed circuit board portion and to the second printed circuit board portion, wherein a rigidity of the third printed circuit board portion is less than a rigidity of each of the first printed circuit board portion and the second printed circuit board portion; wherein the multilayer printed circuit board is foldable along the third printed circuit board portion and, if so folded, the first printed circuit board portion is arranged on top of the second printed circuit board portion.
Public/Granted literature
- US20220078911A1 SYSTEM IN PACKAGE DUAL CONNECTOR Public/Granted day:2022-03-10
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