Invention Grant
- Patent Title: Buried channel structure integrated with non-planar structures
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Application No.: US16257855Application Date: 2019-01-25
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Publication No.: US11728335B2Publication Date: 2023-08-15
- Inventor: Guannan Liu , Akm A. Ahsan , Mark Armstrong , Bernhard Sell
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L27/07
- IPC: H01L27/07 ; H01L29/78 ; H01L29/66 ; H01L29/16 ; H01L29/08 ; H01L27/088 ; H01L21/8234

Abstract:
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, buried channel structures integrated with non-planar structures. In an example, an integrated circuit structure includes a first fin structure and a second fin structure above a substrate. A gate structure is on a portion of the substrate directly between the first fin structure and the second fin structure. A source region is in the first fin structure. A drain region is in the second fin structure.
Public/Granted literature
- US20200243517A1 BURIED CHANNEL STRUCTURE INTEGRATED WITH NON-PLANAR STRUCTURES Public/Granted day:2020-07-30
Information query
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