- 专利标题： Method of semiconductor integrated circuit fabrication
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申请号： US16880718申请日： 2020-05-21
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公开(公告)号： US11735477B2公开(公告)日： 2023-08-22
- 发明人: Ming-Feng Shieh , Hung-Chang Hsieh , Wen-Hung Tseng
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsin-Chu
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址： TW Hsinchu
- 代理机构： Haynes and Boone, LLP
- 分案原申请号： US14066889 2013.10.30
- 主分类号： H01L29/417
- IPC分类号： H01L29/417 ; H01L29/423 ; H01L27/092 ; H01L21/8234 ; H01L21/768 ; H01L21/28 ; H01L21/8238 ; H01L29/43 ; H01L29/49 ; H01L29/51 ; H01L21/321 ; H01L23/532 ; H01L23/528 ; H01L23/522 ; H01L23/485 ; H01L21/4763 ; H01L21/3105 ; H01L29/66
摘要：
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A first conductive feature and a second conductive feature are provided. A first hard mask (HM) is formed on the first conductive feature. A patterned dielectric layer is formed over the first and the second conductive features, with first openings to expose the second conductive features. A first metal plug is formed in the first opening to contact the second conductive features. A second HM is formed on the first metal plugs and another patterned dielectric layer is formed over the substrate, with second openings to expose a subset of the first metal plugs and the first conductive features. A second metal plug is formed in the second openings.
公开/授权文献
- US20200286782A1 Method of Semiconductor Integrated Circuit Fabrication 公开/授权日：2020-09-10
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