Invention Grant
- Patent Title: Methods for fabricating a 3-dimensional memory structure of nor memory strings
-
Application No.: US17382126Application Date: 2021-07-21
-
Publication No.: US11751391B2Publication Date: 2023-09-05
- Inventor: Vinod Purayath , Yosuke Nosho , Shohei Kamisaka , Michiru Nakane , Eli Harari
- Applicant: SUNRISE MEMORY CORPORATION
- Applicant Address: US CA San Jose
- Assignee: SUNRISE MEMORY CORPORATION
- Current Assignee: SUNRISE MEMORY CORPORATION
- Current Assignee Address: US CA San Jose
- Agency: VLP Law Group LLP
- Agent Edward C. Kwok
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H10B43/27 ; H01L29/51
Abstract:
A process for building a 3-Dimensional NOR memory array avoids the challenge of etching a conductor material that is aimed at providing local word lines at a fine pitch. The process defines the local word lines between isolation shafts that may be carried out at a lower aspect ratio than would be required for etching the conductor material.
Public/Granted literature
- US20230247831A9 METHODS FOR FABRICATING A 3-DIMENSIONAL MEMORY STRUCTURE OF NOR MEMORY STRINGS Public/Granted day:2023-08-03
Information query
IPC分类:
