Invention Grant
- Patent Title: High performance fast Mux-D scan flip-flop
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Application No.: US17711638Application Date: 2022-04-01
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Publication No.: US11757434B2Publication Date: 2023-09-12
- Inventor: Amit Agarwal , Steven Hsu , Simeon Realov , Mahesh Kumashikar , Ram Krishnamurthy
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H03K3/00
- IPC: H03K3/00 ; H03K3/037 ; G01R31/3177 ; H03K3/038 ; H03K19/20 ; H03K3/3562

Abstract:
A fast Mux-D scan flip-flop is provided, which bypasses a scan multiplexer to a master keeper side path, removing delay overhead of a traditional Mux-D scan topology. The design is compatible with simple scan methodology of Mux-D scan, while preserving smaller area and small number of inputs/outputs. Since scan Mux is not in the forward critical path, circuit topology has similar high performance as level-sensitive scan flip-flop and can be easily converted into bare pass-gate version. The new fast Mux-D scan flip-flop combines the advantages of the conventional LSSD and Mux-D scan flip-flop, without the disadvantages of each.
Public/Granted literature
- US20220224316A1 HIGH PERFORMANCE FAST MUX-D SCAN FLIP-FLOP Public/Granted day:2022-07-14
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