Invention Grant
- Patent Title: Methods of embedding magnetic structures in substrates
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Application No.: US17567639Application Date: 2022-01-03
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Publication No.: US11862552B2Publication Date: 2024-01-02
- Inventor: Sai Vadlamani , Prithwish Chatterjee , Robert A. May , Rahul S. Jain , Lauren A. Link , Andrew J. Brown , Kyu Oh Lee , Sheng C. Li
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP
- The original application number of the division: US15855453 2017.12.27
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01F17/00 ; H01F41/04 ; H05K1/00 ; H01L23/00 ; H01F27/28 ; H01F27/40 ; H01L21/48

Abstract:
Methods/structures of forming embedded inductor structures are described. Embodiments include forming a first interconnect structure on a dielectric material of a substrate, selectively forming a magnetic material on a surface of the first interconnect structure, forming an opening in the magnetic material, and forming a second interconnect structure in the opening. Build up layers are then formed on the magnetic material.
Public/Granted literature
- US20220130748A1 METHODS OF EMBEDDING MAGNETIC STRUCTURES IN SUBSTRATES Public/Granted day:2022-04-28
Information query
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