- 专利标题： Dual gate control for trench shaped thin film transistors
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申请号： US17492487申请日： 2021-10-01
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公开(公告)号： US11862728B2公开(公告)日： 2024-01-02
- 发明人: Abhishek A. Sharma , Van H. Le , Gilbert Dewey , Jack T. Kavalieros , Shriram Shivaraman , Benjamin Chu-Kung , Yih Wang , Tahir Ghani
- 申请人： Intel Corporation
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Essential Patents Group, LLP
- 主分类号： H01L29/786
- IPC分类号： H01L29/786 ; H01L29/08 ; H01L29/04 ; H01L29/66 ; H01L29/10 ; H01L21/02 ; H01L29/423 ; H10B12/00 ; H01L21/311
摘要：
Disclosed herein are dual gate trench shaped thin film transistors and related methods and devices. Exemplary thin film transistor structures include a non-planar semiconductor material layer having a first portion extending laterally over a first gate dielectric layer, which is over a first gate electrode structure, and a second portion extending along a trench over the first gate dielectric layer, a second gate electrode structure at least partially within the trench, and a second gate dielectric layer between the second gate electrode structure and the first portion.
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