Invention Grant
- Patent Title: Self-aligned contacts
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Application No.: US18098029Application Date: 2023-01-17
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Publication No.: US11887891B2Publication Date: 2024-01-30
- Inventor: Mark T. Bohr , Tahir Ghani , Nadia M. Rahhal-Orabi , Subhash M. Joshi , Joseph M. Steigerwald , Jason W. Klaus , Jack Hwang , Ryan Mackiewicz
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- The original application number of the division: US12655408 2009.12.30
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L29/78 ; H01L29/49 ; H01L29/66 ; H01L29/51 ; H01L21/28 ; H01L21/283 ; H01L21/311 ; H01L23/522 ; H01L23/528 ; H01L29/08 ; H01L29/423 ; H01L29/16 ; H01L29/45 ; H01L21/285 ; H01L23/535

Abstract:
A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that is self aligned to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and contact. The insulator-cap layer enables self-aligned contacts, allowing initial patterning of wider contacts that are more robust to patterning limitations.
Public/Granted literature
- US20230154793A1 SELF-ALIGNED CONTACTS Public/Granted day:2023-05-18
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