Invention Grant
- Patent Title: Optimized storage charge loss management
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Application No.: US17888641Application Date: 2022-08-16
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Publication No.: US11923030B2Publication Date: 2024-03-05
- Inventor: Gary F. Besinga , Renato C. Padilla , Tawalin Opastrakoon , Sampath K. Ratnam , Michael G. Miller , Christopher M. Smitchger , Vamsi Pavan Rayaprolu , Ashutosh Malshe
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G11C29/44
- IPC: G11C29/44 ; G11C16/10 ; G11C16/26 ; G11C29/00 ; G11C29/42 ; G11C29/50

Abstract:
A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including initiating a read operation with respect to a block of the memory device, selecting, based on a set of criteria, a default read offset from a set of read offsets, wherein the set of criteria includes at least one of: a parameter related to trigger rate, or an amount of time that an open block is allowed to remain open to control threshold voltage shift due to storage charge loss, and applying the default read offset to a read operation performed with respect to the block.
Public/Granted literature
- US20220392561A1 OPTIMIZED STORAGE CHARGE LOSS MANAGEMENT Public/Granted day:2022-12-08
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